Hi Jakob,
Can
you please give me some reference/example of bignum optimization which I
can check on powerpc architectures.
Is this any specific
instruction set addition? or something more generic?
Thanks
& Regards
Mithun
Hi
I
have a embedded board P1010 RDB running openssl on VXWORKS 5.4 .
I
am generating RSA 2048 and 3072 bit key pairs.
I am providing
entropy to openssl by using RAND_seed from a HW RNG.
My
average generation time for RSA 2048 key pair is 2 Minutes and 3072 is
8 minutes.
Is there a way to reduce the generation time?
Regards
Mithun