From: Ben Skeggs <bskeggs@xxxxxxxxxx>
- (temporarily) disable if GSP-RM detected, will be added later
- provide empty class list for non-GSP paths
- split tu102 from gm107, it will provide host classes later
Signed-off-by: Ben Skeggs <bskeggs@xxxxxxxxxx>
---
.../drm/nouveau/include/nvkm/engine/nvenc.h | 1 +
.../gpu/drm/nouveau/nvkm/engine/device/base.c | 10 +++---
.../gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild | 1 +
.../gpu/drm/nouveau/nvkm/engine/nvenc/base.c | 3 +-
.../gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c | 2 +-
.../gpu/drm/nouveau/nvkm/engine/nvenc/priv.h | 2 ++
.../gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c | 34 +++++++++++++++++++
7 files changed, 46 insertions(+), 7 deletions(-)
create mode 100644 drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h
index 1a259c5c9a71..1f6eef13f872 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h
@@ -12,4 +12,5 @@ struct nvkm_nvenc {
};
int gm107_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);
+int tu102_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index c0f1a8110452..80ebf2a3a990 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -2427,7 +2427,7 @@ nv162_chipset = {
.fifo = { 0x00000001, tu102_fifo_new },
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000001, tu102_nvdec_new },
- .nvenc = { 0x00000001, gm107_nvenc_new },
+ .nvenc = { 0x00000001, tu102_nvenc_new },
.sec2 = { 0x00000001, tu102_sec2_new },
};
@@ -2462,7 +2462,7 @@ nv164_chipset = {
.fifo = { 0x00000001, tu102_fifo_new },
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000003, tu102_nvdec_new },
- .nvenc = { 0x00000001, gm107_nvenc_new },
+ .nvenc = { 0x00000001, tu102_nvenc_new },
.sec2 = { 0x00000001, tu102_sec2_new },
};
@@ -2497,7 +2497,7 @@ nv166_chipset = {
.fifo = { 0x00000001, tu102_fifo_new },
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000007, tu102_nvdec_new },
- .nvenc = { 0x00000001, gm107_nvenc_new },
+ .nvenc = { 0x00000001, tu102_nvenc_new },
.sec2 = { 0x00000001, tu102_sec2_new },
};
@@ -2532,7 +2532,7 @@ nv167_chipset = {
.fifo = { 0x00000001, tu102_fifo_new },
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000001, tu102_nvdec_new },
- .nvenc = { 0x00000001, gm107_nvenc_new },
+ .nvenc = { 0x00000001, tu102_nvenc_new },
.sec2 = { 0x00000001, tu102_sec2_new },
};
@@ -2567,7 +2567,7 @@ nv168_chipset = {
.fifo = { 0x00000001, tu102_fifo_new },
.gr = { 0x00000001, tu102_gr_new },
.nvdec = { 0x00000001, tu102_nvdec_new },
- .nvenc = { 0x00000001, gm107_nvenc_new },
+ .nvenc = { 0x00000001, tu102_nvenc_new },
.sec2 = { 0x00000001, tu102_sec2_new },
};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild
index 75bf4436bf3f..6dcb20d1d156 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/Kbuild
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: MIT
nvkm-y += nvkm/engine/nvenc/base.o
nvkm-y += nvkm/engine/nvenc/gm107.o
+nvkm-y += nvkm/engine/nvenc/tu102.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c
index cf5dcfda7b25..d45dbb42a0db 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c
@@ -34,6 +34,7 @@ nvkm_nvenc_dtor(struct nvkm_engine *engine)
static const struct nvkm_engine_func
nvkm_nvenc = {
.dtor = nvkm_nvenc_dtor,
+ .sclass = { {} },
};
int
@@ -59,4 +60,4 @@ nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *fwif, struct nvkm_device *device,
return nvkm_falcon_ctor(nvenc->func->flcn, &nvenc->engine.subdev,
nvenc->engine.subdev.name, 0, &nvenc->falcon);
-};
+}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c
index ad27d8b97569..922abb647ad3 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c
@@ -38,7 +38,7 @@ gm107_nvenc_nofw(struct nvkm_nvenc *nvenc, int ver,
return 0;
}
-static const struct nvkm_nvenc_fwif
+const struct nvkm_nvenc_fwif
gm107_nvenc_fwif[] = {
{ -1, gm107_nvenc_nofw, &gm107_nvenc },
{}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h
index 4130a2bfbb4f..b097e3f2867b 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h
@@ -14,6 +14,8 @@ struct nvkm_nvenc_fwif {
const struct nvkm_nvenc_func *func;
};
+extern const struct nvkm_nvenc_fwif gm107_nvenc_fwif[];
+
int nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *, struct nvkm_device *, enum nvkm_subdev_type,
int, struct nvkm_nvenc **pnvenc);
#endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c
new file mode 100644
index 000000000000..8a436b398749
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/nvenc/tu102.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2023 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "priv.h"
+
+#include <subdev/gsp.h>
+
+int
+tu102_nvenc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+ struct nvkm_nvenc **pnvenc)
+{
+ if (nvkm_gsp_rm(device->gsp))
+ return -ENODEV;
+
+ return nvkm_nvenc_new_(gm107_nvenc_fwif, device, type, inst, pnvenc);
+}
--
2.41.0
