On Fri, May 26, 2023 at 5:11 AM Karol Herbst <kherbst@xxxxxxxxxx> wrote: > > 1ba6113a90a0 removed a lot of the kernel GPU channel, but method 0x128 > was important as otherwise the GPU spams us with `CACHE_ERROR` messages. > > We use the blit subchannel inside our vblank handling, so we should keep > at least this part. > > v2: Only do it for NV11+ GPUs > > Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/201 > Fixes: 4a16dd9d18a0 ("drm/nouveau/kms: switch to drm fbdev helpers") > Signed-off-by: Karol Herbst <kherbst@xxxxxxxxxx> > --- > drivers/gpu/drm/nouveau/nouveau_chan.c | 1 + > drivers/gpu/drm/nouveau/nouveau_chan.h | 1 + > drivers/gpu/drm/nouveau/nouveau_drm.c | 20 +++++++++++++++++--- > 3 files changed, 19 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c > index e648ecd0c1a0..3dfbc374478e 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_chan.c > +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c > @@ -90,6 +90,7 @@ nouveau_channel_del(struct nouveau_channel **pchan) > if (cli) > nouveau_svmm_part(chan->vmm->svmm, chan->inst); > > + nvif_object_dtor(&chan->blit); > nvif_object_dtor(&chan->nvsw); > nvif_object_dtor(&chan->gart); > nvif_object_dtor(&chan->vram); > diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.h b/drivers/gpu/drm/nouveau/nouveau_chan.h > index e06a8ffed31a..bad7466bd0d5 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_chan.h > +++ b/drivers/gpu/drm/nouveau/nouveau_chan.h > @@ -53,6 +53,7 @@ struct nouveau_channel { > u32 user_put; > > struct nvif_object user; > + struct nvif_object blit; > > struct nvif_event kill; > atomic_t killed; > diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c > index cc7c5b4a05fd..9512f1c2f871 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_drm.c > +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c > @@ -369,15 +369,29 @@ nouveau_accel_gr_init(struct nouveau_drm *drm) > ret = nvif_object_ctor(&drm->channel->user, "drmNvsw", > NVDRM_NVSW, nouveau_abi16_swclass(drm), > NULL, 0, &drm->channel->nvsw); > + > + if (ret == 0 && device->info.chipset >= 0x11) { Can you double-check that this is needed on NV15? IIRC there's some non-linearity of chipsets here which is why we had (some long time ago, not sure if it's still there), a chip class which would simplify such checks. Cheers, -ilia
