Realized when I moved nouveau over to using the atomic DP MST VCPI
helpers that I forgot to ensure that we clamp the BPC to 8 to make us
less likely to run out of bandwidth on a topology when enabling multiple
displays that support >8 BPC - something we want to do until we have
support for dynamically selecting the bpc based on the topology's
available bandwidth, since userspace isn't really using HDR yet anyway.
This matches the behavior that i915 has, along with the behavior of
amdgpu and should fix some people's displays not turning on.
Lyude Paul (3):
drm/nouveau/kms/nv50-: Call outp_atomic_check_view() before handling
PBN
drm/nouveau/kms/nv50-: Store the bpc we're using in nv50_head_atom
drm/nouveau/kms/nv50-: Limit MST BPC to 8
drivers/gpu/drm/nouveau/dispnv50/atom.h | 1 +
drivers/gpu/drm/nouveau/dispnv50/disp.c | 102 ++++++++++++++----------
drivers/gpu/drm/nouveau/dispnv50/head.c | 5 +-
3 files changed, 64 insertions(+), 44 deletions(-)
--
2.21.0
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