I'm using a AMD Athlon 64 X2 L310 (1.2ghz).
It would not be a easy task (for me) to develop, because I'm not a Assembly profissional programmer, and I'm not a young man who have
much time to develop all utils those I would like to create.
It would not be easy, too, because it will be necessary (I think/believe) to set paging (x86) mechanism, enabling long mode, ... ...Well, if not, it will be easier.
I'm imaginating a very simple program!! But if someone wants to create (doesn't want to wait me), ... my tip is: "So my Friend: Let's go! Do it!"!
Regards.
Peace out.
2012/12/11 Lukáš Oliva <olivalukas@xxxxxxxxx>
Just for my curiosity, how do you plan to use the results? Also,
which processors do you intend to test (NUMA too)?
Lukas
2012/12/10 Gustavo da Silva <gustavodasilva@xxxxxxxxx>:
> Very interesting!! Both the link and the movntq instruction. I'll read and
> study.
>
> Thanks Tobias!!
>
> 2012/12/8 Tobias Boege <tobias@xxxxxxxxxxxxxx>
>>
>> On Sat, 08 Dec 2012, Gustavo da Silva wrote:
>> > Hello Kernel Brothers!! How are you???
>> >
>> > So, I would like test the performance of my notebook, developing one or
>> > two
>> > utilities, and have a better
>> > mensurement about the speed.
>> >
>> > But it can help all of us.
>> >
>> > 1st: I would like mensure the speed making a counter (exacly bogomips?
>> > may
>> > be). Loop+counter during 1 tickrate.
>> > 2nd: The most interesting: How many memory cells in ram can we
>> > access during 1tickrate? How could we develop this?!
>> >
>> > Both utils may run in long mode (64bits). Well, in real mode too; so, we
>> > can compare the speed in the two modes!
>> >
>> > Some one knows how to develop a very small program/routine about that?!
>> >
>> > For the 2nd situation, a simple idea wrote in codesnipet form (consider
>> > the
>> > intention, not the sintax! there are bugs! I know. Intel syntax.)
>>
>> Obviously! ;-)
>>
>> >
>> > dw the_counter_cell 0
>> > lea bx, the_counter_cell
>> > xor bx,bx
>> > label:
>> > inc [bx] # Could not be so simple like this, because the address
>> > can
>> > be cached. Right?
>> > loop label # breaked by an interruption. Just to express the
>> > intention.
>> >
>> > How could we create a small code for the 2nd situation, tring to force
>> > the
>> > processor to not use the cache?
>>
>> As Drepper says[0], use the movntq instruction on x86_64 to bypass the
>> cache.
>>
>> Regards,
>> Tobi
>>
>> [0] http://www.akkadia.org/drepper/cpumemory.pdf p. 47ff.
>>
>>
>> _______________________________________________
>> Kernelnewbies mailing list
>> Kernelnewbies@xxxxxxxxxxxxxxxxx
>> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>
>
>
>
> --
> Atenciosamente,
>
> Gustavo da Silva
> gustavodasilva@xxxxxxxxx
>
> _______________________________________________
> Kernelnewbies mailing list
> Kernelnewbies@xxxxxxxxxxxxxxxxx
> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
>
Atenciosamente,
Gustavo da Silva
gustavodasilva@xxxxxxxxx
_______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
