Thanks for answering.
On Fri, Oct 19, 2012 at 3:33 PM, Arun KS <getarunks@xxxxxxxxx> wrote:
On Fri, Oct 19, 2012 at 3:03 PM, telenn barz <telenn.barz@xxxxxxxxx> wrote:
Q: In the 4G/4G split case, I don't see why we have to necessarily flush the TLB when switching from user-space to kernel-space ? Why the TLB couldn't be shared across one user-space to kernel-space switch, and be flushed only every two switches ?
In 4G/4G split, kernel space(KS) and user space(US) both have 4GB address space. So there can be a same virtual address present in KS & US which corresponds to two different physical addressess.
When switching from US to KS or vice versa, the pointer to page table has to be changed in the MMU. So TLB which is just a cache for the page tables has to be flushed aswell.
Yes you're right.
So considering the traditional 3G/1G split, another question is why the kernel restricts itself to a "window" of 128MB on high memory. Can we imagine rather that the kernel would simply allow itself to dynamically use some virtual pages of the 3G user-space part (while changing their access rights of course) ?
Thanks,
Telenn
So considering the traditional 3G/1G split, another question is why the kernel restricts itself to a "window" of 128MB on high memory. Can we imagine rather that the kernel would simply allow itself to dynamically use some virtual pages of the 3G user-space part (while changing their access rights of course) ?
Thanks,
Telenn
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