On 10.04.2012 19:58, Wink Saville wrote: > Sounds to me like there needs to be a flush of the processor cache > by using memory barriers. I used a wmb(); right after I set the value I wanted. > I'm guessing that the IRQ is taken on a different thread and possibly > a different processor and the value needs to be flushed. You might > try having devid be an atomic_t and then use atomic_set > and atomic_read so that the "proper" memory barriers are used. should I use atomic ops instead of a wmb? The interrupt can't happen until the value is assigned completely in one thread. I'm sure. _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
