On Fri, Jan 27, 2012 at 2:32 PM, Kristof Provost <kristof@xxxxxxxxxx> wrote: > On 2012-01-27 11:43:10 (+0530), Manavendra Nath Manav <mnm.kernel@xxxxxxxxx> wrote: >> I have developed a Makefile which recursively builds the code spread >> across multiple directories, each having it's own Makefile. >> >> build_all: targetA \ >> targetB \ >> target C >> >> Now, the problem is that even when the Makefile of targetA fails, the >> master Makefile continues building with targetB and targetC. I can >> also see the make errors being printed on console. I want the make to >> stop immediately at the first error encountered in any target >> Makefile. How to do this? >> > It would be a lot easier to help you if you'd post the relevant bits of > your Makefile. > > Dusting off my crystal ball, I see in the mists that your makefile looks > something like this: > > build: > for d in $(DIRS) ; \ > do \ > $(MAKE) -C $$d $@ ; \ > done > > The problem here is that make considers the whole for loop as one and > doesn't get the exit status of each sub-make, but only of the last one. > > Try something like this instead: > > build: > for d in $(DIRS) ; \ > do \ > $(MAKE) -C $$d $@ || exit $? ; \ > done > > Regards, > Kristof > Hi Kristof, Your crystal ball insight was fairly accurate. The syntax "$(MAKE) -C $$d $@ || exit $? ;" is both new and helpful to me. For more clarity, the format of my Makefile is like this: my_exec: Build_sqllib \ Create_obj_dir \ objs/server/foo.o \ objs/server/bar.c $(LINK) -o my_exec \ objs/server/foo.o \ objs/server/bar.c Build_sqllib: cd src/sqllib; \ rm -rf LIBS/*; \ make; \ rm -f $(CURDIR)/sqllib.a; \ cp -fv LIBS/sqllib.a $(CURDIR)/lib/sqllib.a;\ cd $(CURDIR); Create_obj_dir: mkdir -p objs/server \ objs/html \ objs/log \ objs/cipher \ objs/curse \ objs/crypto \ objs/protocol objs/server/foo.o: \ src/server/foo.c $(LINK) -c \ -o objs/server/foo.o \ src/server/foo.c Now, I am getting error in the make part of "Build_sqllib" but the makefile continues to next line. I guess, I need to add "|| exit" also with this make command. Kristof, can you pls also explain me the meanings of $$d, $@, and $? as used in Makefiles. -- Manavendra Nath Manav _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
