Re: Memory barrier

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Thanks,

I got bit confuse with below statement:
This is from paper Memory access ordering Part 2
SMP conditional barriers
The SMP conditional barriers are used to ensure a consistent view of
memory between different cores within a cache coherent SMP system.
When compiling a kernel without CONFIG_SMP, all SMP barriers are
converted into plain compiler barriers.

2011/12/9 卜弋天 <buyit@xxxxxxx>:
> Hi :
>
>       memory barriers can not make order on other cpus, only the current
> cpu's order will be promised.
>
>
>
>> Date: Fri, 9 Dec 2011 12:54:40 +0530
>> Subject: Memory barrier
>> From: trisha1march@xxxxxxxxx
>> To: Kernelnewbies@xxxxxxxxxxxxxxxxx
>
>>
>> Hi All,
>>
>> I need small clarification on memory barrier.
>> #define smp_mb()        mb()
>> #define smp_rmb()       rmb()
>> #define smp_wmb()       wmb()
>> In case of SMP:
>> is smp_mb() or smp_rmb() make order on current CPU or all cpu's
>>
>> Thanks
>>
>> _______________________________________________
>> Kernelnewbies mailing list
>> Kernelnewbies@xxxxxxxxxxxxxxxxx
>> http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies

_______________________________________________
Kernelnewbies mailing list
Kernelnewbies@xxxxxxxxxxxxxxxxx
http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies



[Index of Archives]     [Newbies FAQ]     [Linux Kernel Mentors]     [Linux Kernel Development]     [IETF Annouce]     [Git]     [Networking]     [Security]     [Bugtraq]     [Yosemite]     [MIPS Linux]     [ARM Linux]     [Linux RAID]     [Linux SCSI]     [Linux ACPI]
  Powered by Linux