Re: Self modifying code in ARM 11 architectures

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On Tue, May 24, 2011 at 6:15 PM, Ashok Babu <ashok3d@xxxxxxxxx> wrote:
Hi All,

I am no success in booting up the ARM1176 processor with the linux-2.6.32 kernel.

While googling about the ARM Harvard architecture, I came to know that we have to flush/invalidate the D-Cache and I-Cache 
when using the self modifying codes.

So here my questions/doubts :
1) Is'nt it the kernel itself is self modifying code with lots of function pointers ?
    If yes, how is synchronization b/w d-cache and i-cache handled in the kernel ?
2) Can this be the reason for the kernel not booting for me ?
    Because If i disable the I-Cache in the config, then the kernel boots up without any issues.

Any pointers on this will be of great help.

Here:

http://blogs.arm.com/software-enablement/141-caches-and-self-modifying-code/

read the part on "The Solution" - it describe function pointer on a register, and what u are supposed to do with cache transfer.   (java is full of JIT compilation)
 
Thanks & Best Regards
Ashok
                          



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--
Regards,
Peter Teoh
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