On Thursday 21 Apr 2011 6:52:29 am Dave Hylands wrote: > Hi, > > On Wed, Apr 20, 2011 at 11:08 AM, mindentropy <mindentropy@xxxxxxxxx> wrote: > > On Wednesday 20 Apr 2011 11:00:17 pm Dave Hylands wrote: > >> I think that this is true for all of the architectures I've worked > >> with (ARM, MIPS, x86). Some architectures (like MIPS) have a > >> combination of spaces which are linearly mapped between virtual and > >> physical, and mapped spaces (which go through an MMU). > > > > Is this just identity mapping or does it bypass the paging unit for some > > addresses? Just out of curiosity how do you tell the bypassing info? > > On the MIPS core I was working with (which I think was R3000 based), > they use the upper 2 or 3 bits of the address to determine the type of > access. > > This page has the details (the table about 1/3 of the way down the web > page): > <http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/mips.htm > l> Thanks for the info. Never knew about this. _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
