Hi John, On Wed, Apr 20, 2011 at 4:01 AM, limp <johnkyr83@xxxxxxxxxxx> wrote: > Thanks a lot Dace and Vladimir for your replies. > > First of all, I forgot to mention that I am talking for x86 architecture. I think that this is true for all of the architectures I've worked with (ARM, MIPS, x86). Some architectures (like MIPS) have a combination of spaces which are linearly mapped between virtual and physical, and mapped spaces (which go through an MMU). ARM can switch back and forth by enabling and disabling the MMU, but when running under linux, the MMU is always on. >> The CPU registers will contain the virtual addresses. Each and every >> time that the CPU tries to access a virtual memory location, then the >> address will be translated by the MMU into a physical address. > > So, AFAIU the translation to physical memory takes place *only* when the ALU > of the processor has to do some operation which has memory operands (in > this case the CPU needs to deal with the *real* addresses) but not prior to > that. > > Now if, for example, EIP has the value of 0xB71B13E8 and I know that on > B70CC000-B71B7000 the libX11.so is linked, then the IP points to the 0xE53E8 > (0xB71B13E8 - B70CC000) offset of libX11.so? Is that right? Correct. -- Dave Hylands Shuswap, BC, Canada http://www.davehylands.com _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx http://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies