Re: Regarding enable paging code and swapper_pg_dir.

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On Sat, Apr 02, 2011 at 11:18:19PM +0530, mindentropy wrote:
> On Saturday 02 Apr 2011 9:55:35 pm James Light wrote:
> > 
> > To put the physical address into cr3 later.
> > $swapper_pg_dir is not the PHYSICAL address of the PGD.
> 
> Correct me if I am wrong but a mov $foo,%eax would move the address of foo  
> variable to eax right? Or is there a macro somewhere where they are adding 
> PAGE_OFFSET to the address so that the $swapper_pg_dir - __PAGE_OFFSET 
> justifies?

Right, but it uses the logical address of foo which n the case of swapper_pg_dir
must be converted to a
physical address. When paging is not enabled, linear addresses are interpreted
as physical addressess. So it has to get this logical address only one step
farther into a linear address.

So, this "swapper_pg_dir" is a symbol in a section of code. That section of code
has an associated segment and this symbol lives at a particular location in that
section and thus in that segment, and that particular location, relative to the
beginning of the section is it's offset. Combine those two and
you have the logical address of swapper_pg_dir. 

The sigil "$" is the immediate
value sigil and the symbol $swapper_pg_dir thus uses the immediate value of
swapper_pg_dir. The immediate value of swapper_pg_dir is the value held at the
location that is logically labeled by the symbol swapper_pg_dir.

It may help to remind yourself that symbol names in assembly are very similar to
labels in assembly. They mark a location in the program. The program runs and
while running it only uses logical addresses. This particular code is loading a
linear (and w/out paging therefore physical) address. 
This is simply because of the design of the cr3 register and
paging in x86. 

>From http://www.intel.com/design/processor/manuals/253668.pdf 
Chapter 4: Paging (Page 1)
------------------------------------------------------------------------------
Software enables paging by using the MOV to CR0 instruction to set CR0.PG.
Before
doing so, software should ensure that control register CR3 contains the physical
address of the first paging structure that the processor will use for
linear-address
translation (see Section 4.2)

------------------------------------------------------------------------------


In linux2.1.66, the physical address is used directly.
Just for comparison:
------------------------------------------------------------------------------
58/*
59 * Setup paging (the tables are already set up, just switch them on)
60 */
611:
62        movl $0x101000,%eax
63        movl %eax,%cr3          /* set the page table pointer.. */
64        movl %cr0,%eax
65        orl $0x80000000,%eax
66        movl %eax,%cr0          /* ..and set paging (PG) bit */
67        jmp 1f                  /* flush the prefetch-queue */
------------------------------------------------------------------------------

If any of my own reasoning is wrong, I hope someone w/ more clue jumps in. ;)


     -James L

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