Re: How to identity processor architecture

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Hi Mulyadi,
> On Thu, Jan 27, 2011 at 13:40, prabhu <prabhum@xxxxxxxxxxxxx> wrote:
>   
>> No, because 32bit code will tell the datatype size and i think pointer
>> variable depends on architecture.
>> So 64 bit processor needs 64 address line to point the data location. So
>> pointer variable needs to be 8 byte.
>>     
>
> Please don't top post and please use the new list address, ok? :)
>   
Sure, Thanks for your reply.
> IMO, I second your opinion. And as addition, I think it's worth to
> check /proc/cpuinfo too  in "address sizes" field
>   
I am getting below output for /proc/cpuinfo . I hope *cpu family : 6 
*means x86 family(32 bit processor). What if its 64 bit processor. ( I 
dont have system to check this.)

processor : 0
vendor_id : GenuineIntel
*cpu family : 6*
model : 15
model name : Intel(R) Pentium(R) Dual CPU E2160 @ 1.80GHz
stepping : 13
cpu MHz : 1200.000
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 2
apicid : 0
initial apicid : 0
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat 
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc 
arch_perfmon pebs bts pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr 
pdcm lahf_lm
bogomips : 3591.05
clflush size : 64
power management:

processor : 1
vendor_id : GenuineIntel
*cpu family : 6*
model : 15
model name : Intel(R) Pentium(R) Dual CPU E2160 @ 1.80GHz
stepping : 13
cpu MHz : 1200.000
cache size : 1024 KB
physical id : 0
siblings : 2
core id : 1
cpu cores : 2
apicid : 1
initial apicid : 1
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 10
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat 
pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx lm constant_tsc 
arch_perfmon pebs bts pni dtes64 monitor ds_cpl est tm2 ssse3 cx16 xtpr 
pdcm lahf_lm
bogomips : 3590.97
clflush size : 64
power management:
> NB: I was thinking, if in x64, it is operating in full 32 bit mode
> (not hybrid one), it is supposed to yield 32 bit address too, right?
>   
I'm sorry . I have no idea about this.

Thanks,
Prabhu

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