On 10/2/2010 3:08 AM, Sri Ram Vemulpali wrote:
Hi All,
I am developing segmentation for my kernel. In that process I
choose to divide whole memory in to fixed size segments. So a 4GB
memory can be divided in to 8192 segments. So I initialize segment
descriptors in to the GTD withs segments base address and limit. Here
base address are 0,0x10000,0x20000,..... and limit is 64kb always for
every segment. For a task if I choose a segment to assign, I will
place the index of that segment descriptor in to CS, DS. Now when
process generates address to put on address bus, then it will do
computation from logical address to linear address.
After processor picks logical address, it chooses segment descriptor
and adds this 32-bit logical address to segment base address to
generate linear address. Now my question is, if my segment size is
64kb, how is that 32-bit offset is added to segment base address,
which is not right.
As you know the limit is the _max_ which a single segment can scale.
IE 32bit or 4GB. Since segments need not have a fix size
It should only consider 16-bit offset to add to
there is a granularity bit which determines the 16bit (1MB)
vs the 32bit.
base to generate linear address. How can I tell to my processor to
choose only 16-bit offset.
the granularity bit if cleared (zero) determines a 16bit address.
Does processor drives offset bit width
automatically based on limit defined in segment descriptor.
Any insight in to this will help me. please clarify my doubt. Waiting
for you reply.
Regards,
Sri.
Thanks
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