2010/9/30 Sri Ram Vemulpali <sri.ram.gmu06@xxxxxxxxx>: > Hi All, > > I have a doubt regarding implementation of segmentation in OS. > > Since GDT is used to implement the segmentation, in that table > you add all segments descriptors dividing the linear address space. > In a flat model you assign for every descriptor the base as 0x0 > and limit as 4GB. This way every DS,CS sees the complete 4GB memory. > But how is the segment protection implemented. I mean if > segments are not divided with different base address and limit > preventing > overlapping, there is a possibility of stepping in to other > segment. So, why is the flat model is implemented. Also, If I strictly > implement If base on x86 architecture, suggest to read intel or AMD 's cpu manual. Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3A: System Programming Guide, Part 1 3.1 MEMORY MANAGEMENT OVERVIEW "If paging is not used, the linear address space of the processor is mapped directly into the physical address space of processor. The physical address space is defined as the range of addresses that the processor can generate on its address bus. Because multitasking computing systems commonly define a linear address space much larger than it is economically feasible to contain all at once in physical memory, some method of “virtualizing” the linear address space is needed. This virtualization of the linear address space is handled through the processor’s paging mechanism. Paging supports a “virtual memory” environment where a large linear address space is simulated with a small amount of physical memory (RAM and ROM) and some diskstorage. When using paging, each segment is divided into pages (typically 4 KBytes each in size), which are stored either in physical memory or on the disk. The operating system or executive maintains a page directory and a set of page tables to keep track of the pages. When a program (or task) attempts to access an address location in the linear address space, the processor uses the page directory and page tables to translate the linear address into a physical address and then performs the requested operation (read or write) on the memory location." Some embedded system is not using paging mechanism, because they need real-time response time and reduce task "jitter". So need programmers implement the task smaller than the limitation. Got some information for variable-length segments in internet as below. "Some systems, such as Burroughs B5500,do not use paging to implement virtual memory. Instead, they use segmentation, that divide virtual address spaces into variable-length segments. A virtual address consists of a segment number and an offset within the segment." > segmentation without paging, then I can have only 8192 segments > of size 64kb for whole 4GB address space. Then I have all the segment > descriptors in the GDT. Now if some task uses all its complete > segment size, and needs some more space, then is it possible to assign > another DS segment. If so, how is that accomplished, since we > need to load in DS new index of segment descriptor and keep track of > all > indexes in to GDT. > > Can anyone explain how above mentioned things can be achieved. > -- > Regards, > Sri. > > -- > To unsubscribe from this list: send an email with > "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx > Please read the FAQ at http://kernelnewbies.org/FAQ > > -- Best Regards Lin -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
