Hi,
There are some problems puzzled me concerning interrupts.
1. The following excerpt code is from function mask_and_ack_8259a:
197 handle_real_irq:
198 if (irq & 8) {
199 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
200 outb(cached_slave_mask, PIC_SLAVE_IMR);
201 outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI'
to slave */
202 outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /*
'Specific EOI' to master-IRQ2 */
203 } else {
204 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
205 outb(cached_master_mask, PIC_MASTER_IMR);
206 outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI
to master */
207 }
208 spin_unlock_irqrestore(&i8259A_lock, flags);
The operations are seemingly all dedicated to change the status of
8259A chip, including masking the corresponding interrupt line
specific to irq, while none to affect the kernel data structure.
Therefore, I wonder what's role of the flag of IRQ_DISABLED.
2. When processing an IRQ, is there any chance to lost the same IRQ
comes next? Take keyboard, if I keep a key pressing down for a while,
the keyboard will raise the same IRQ continually. The first occurence
lead the CPU to jump to a corresponding ISR, and before the ISR
finishing the 8259A can not accept the same IRQ, and the next
occurence of the same IRQ come form the keyboard. Will the second
occurence lost?
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