Hi! On 14:01 Fri 06 Feb , Pei Lin wrote: > hi, > who can give some advice about this question? Because the young > men like me don't know > some history legacy. > > > > ---------- Forwarded message ---------- > From: pei lin <telent998@xxxxxxxxx> > Date: 2009/2/6 > Subject: Re: why linux ELF base address is 0x8048000? > To: Brian Raiter <breadbox@xxxxxxxxxxxxxx> > ?????? Chris Evans <teknopup@xxxxxxxxx>, linux-assembly@xxxxxxxxxxxxxxx > > > yeah,that explains some reason. But between 0x08000000 and 0x08048000 > should be some other reason for X86 architecture . <<The linker and > loader>> said that "permitting most programs to use a single > second-level page table." > > But i can not understand it very well. I cannot tell you the exact reason for the reason of the load address, but maybe something else which helps you to understand: Linux makes use of virtual memory for user space programs. This means that you do not address physical memory directly, but through a virtual address space. This virtual addresses are translated to physical addresses. This is done by the CPU(s) To do this the main memory is devided in pages of a fixed size, which is 4kb on x86 (not taking hugetlb into account). This means that you have quite a lot of pages, if you lots of memory. You must have a mapping for each mapped page in mapped page in the virtual address. This is because even if the user space application allocates a large continuous range, the physical pages are usually scattered. Defragmenting the physical pages is hard. To allow large virtual address spaces, you cannot store this translation in a single physically continous memory region. The memory region would *way* too large. For this reason there is a thing called "Multi-Level Page Tables". It basically means that you have a "top" page table which in referenced in a CPU control register (CR3). This page table stores either an "array" of mappings or (if there are too many mappings) an array of pointers to more page tables. These page tables may themself contain either an "array" of mappings or an array of pointers to more page tables, just like the top page. These page tables may have up to 3 (32 bit x86) or 5 (64 bit x86) layers. If you have many layers, the cost/latency of a lookup increases. This can decrease performance and you usually want to avoid having big tables with many layers. When you allocate memory in a non-continuous way, you may end up wasting page table space for unallocated memory (see http://lwn.net/Articles/253361/ ). The original poster therefore has speculated, that allocating at this address help(ed?) to reduce the number of page table layers... -Michi -- programing a layer 3+4 network protocol for mesh networks see http://michaelblizek.twilightparadox.com -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
