Hi.... On Mon, Sep 1, 2008 at 12:44 PM, Umashankar V.K. <shankar.vk@xxxxxxxxx> wrote: > Hi, > > I want to write a test to demonstrate cache-thrashing. > > a) In Linux, is it possible to request a malloc'd page to be allocated as > non-cacheable ? in user space or kernel space? and by "cached" do you mean cached by L1/L2/L3? IIRC, controlling L1/L2/L3 can only be done in kernel space by directly manipulating page table entry (make it write through instead of write back)....but I forgot which macro you should use... sorry... > b) The cacheability attribute is a bit-field in the PTE ( page table entry > ) of the page-frame, Right ? yup... > There may be multiple PTEs ( synonyms ) which map to the same physical > page. What will happen if the synonyms have > different value for the cacheable field ? > interesting question...once I thought about that about that too. Although I haven't done any experiment to prove how the real thing works, I guess it depends which virtual address do you use when accessing the related physical page frame. If you are using virt address which correlates to PTE that use "write through", then data go straight to the RAM. > c) Do I have control to keep the code of my program/process in > non-cacheable page ? Another Interesting question . AFAIK kernel loader keeps code section of your process in cacheable page frame and so far I see tunables to change this behaviour. So unless you tweak the loader code, I don't think you can change this behaviour. regards, Mulyadi -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
