Re: splitting of address space

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Hi..
I was reading the LDD3's DMA chapter (chapter 15). The author talks
about the splitting of address space between 1GB and 3GB. I couldn't
make myself crystal clear as to why it is done.
because things like code and data must stay and operate in different modes. Kernel code stays in kernel space, that way user can not directly execute arbitrary kernel codes without first elevating its privilege.

Also, some codes must be put on kernel space so they can manage the hardwares. I/O, setting up page tables, managing CPU clock. Of course, there's nothing stopping you from creating OS with all-in-kernel-mode programming style, but IMHO that will make that OS very very vulnerable to local attack and any code can control anything it wants without coordination.

I got even more
confused when he said kernel can't access physicalmemory address which
is not mapped into kernel space. Why doesn't kernel has full access to
all the address space?
In 32 bit, you have 4 GB address space. This 4GB space is splitted between kernel and user space, usually 1 GB for kernel space and 3GB for user space. Within this 1GB space, the kernel must map the RAM so they become accessible. Unfortunately, not all that 1 GB space can freely used. Normally, the upper 128 MB space is reserved for high memory mapping. So, it leaves you the rest (896 MB) for normal mapping.

In 64 bit, you have all the room to map the entire RAM, because theoritically 64 bit gives you "unlimited space".

Why you need to map first before you can access them? Because if you don't map them (by setting the approriate page directory, page middle directory, page table entry), the MMU (memory management unit) can not translate your requested address (logical address) into physical address. . This is especially needed since Linux operates in protected mode. In real mode addressing, you just need to deal with segmentation.

read Intel documentation in www.intel.com for deeper explanation about all these hardware internals. maybe, LDD forgot to mention that the explanations are based on Intel x86 32 bit... that's why you got all those confusions.

regards,

Mulyadi




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