RE: Shared Interrupt handling.

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thanks for the input Rajat. 
I have another follow up question how does one decide which interrupt number to use let for a pci device. 
can the number u chose be dynamic so that one doesn't run into any irq conflicts. 

thanks 
kbisla



----------------------------------------
> Date: Sat, 5 May 2007 08:21:53 +0530
> From: rajat.noida.india@xxxxxxxxx
> To: 2500.pradeep@xxxxxxxxx
> Subject: Re: Shared Interrupt handling.
> CC: k_bisla@xxxxxxxxxxx; vapier.adi@xxxxxxxxx; kernelnewbies@xxxxxxxxxxxx
> 
> On 5/4/07, pradeep singh  wrote:
> > On 5/4/07, Rajat Jain  wrote:
> > > Hi,
> > >
> > > > > The interrupts are disabled at the interrupt controller while kernel
> > > > > is handling an IRQ. So any new interrupt generated before the kernel
> > > > > handles the old interrupt will be lost.
> > > > >
> > > > I'm a little confused with your comment above. "INT lost while kernel
> > > > processing the last INT".
> > > > I would think it won't be lost, maybe more like delayed in processing.
> > > > Doesn't the interrupt controller send the INT when the kernel re-enables the
> > > > INT again.
> > > > With what u are suggesting we would lose INT a lot.
> > >
> > > Here is an extract from the LDD3 sec 10.7:
> > >
> > > "void disable_irq(int irq);
> > > void disable_irq_nosync(int irq);
> > > void enable_irq(int irq);
> > >
> > > A driver can enable and disable interrupt reporting. If the hardware
> > > tries to generate an interrupt while interrupts are disabled, the
> > > interrupt is lost forever. A driver using a shared handler must not
> > > use these functions."
> > >
> > > These are the functions that disable / enable irq at the PIC level.
> > So do you mean, no interrupts are kind of buffered in the Local APIC
> > while the APIC is waiting for EOI?
> 
> If the interrupts are disabled at the APIC level (disable_irq()), then
> no. If the interrupts are disabled at the processor
> (local_irq_disable()), then yes.
> 
> Somebody please CMIIW
> 
> Thanks,
> 
> Rajat

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