Hi Suman > Thanks for the reply.could you please more elaborate on that? Which part that you didn't understand? About the grouping certain properties of a structure in same cache line? OK, let's assume L1 data cache is 64 byte per line. Within a line, you store two "long" variable, let's name them A and B. Also assume that A and B are put inside the same page frame (4KB size), thus they are adjacent to each other. Assume that this is the first time A and B are read. First, A is read. Because A is just 4 byte (standart size of "long" in 32 bit x86), B is also fetched. 64 byte is enough to cache them. Next, if B is read, no need to pick it on RAM. Getting it from cache is enough. The problem comes if one of them is modified. Assume you do B=B+1. This makes B increased by one and thus its content in cache isn't synchronized anymore with the related RAM cell. So, eventually that cache line must be flushed out and that means A is flushed out too since flush operation is done per line basis. Next, you do printf("%d", A), so once again A must be fetched from RAM. If you extremely demand speed 'til the last blood drop, this is certainly something you want to avoid :) It would be wiser to put this way. Using certain gcc alignment attribute, make B so it stays on the other cache line. That way, if you mess out with B, it won't put any trouble to A. Of course, that is assuming you have plenty of cache just for protecting A :) In real world, of course you must balance between cache miss cost and overall perfomance gain. Hope it clarifies your doubts... and guys, CMIIW. regards, Mulyadi. -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/