On Wed, 2006-09-13 at 16:13 +0200, Jakko Pastuchio wrote:
> Hi !
>
Hi,
> On 9/13/06, Amol Lad <amol@xxxxxxxxxxxxxxxxxxx> wrote:
> > On Wed, 2006-09-13 at 12:58 +0200, Jakko Pastuchio wrote:
> > > I've noticed that the flush_icache_* routines on the i386
> > > are nothing more than an empty do{}while(0) stub.
> > > does anyone know why is that ?
> > If my understanding is correct then these functions are mainly required
> > for virtual caches where you need to flush instruction cache say during
> > context switch. It's not required for x86 as x86 caches are physically
> > tagged caches
>
> hmm. thanks for that insight.
> but what about events when the *physical* address space has changed
> (e.g. module loading) ? we still need to invalidate the cache, don't we ?
Nope; the x86 architecture is defined to be fully cache coherent,
including in this way. The only corner case I know of is if you are
doing self modifying code and you are changing your own/next
instruction.
>
> so is there a way to invalidate instruction caches on the x86 ?
you can invalidate ALL the caches, but you generally don't need to do
that...
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