Re: Query regarding interrupts on a dual core machine

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On 8/1/06, Fabio Guarneri <fabioguarneri@xxxxxxxxx> wrote:
Why CONFIG_NR_CPUS=2 ??
 The dual core CPU has 2 cores with hyper threading. Try to change it.
CONFIG_NR_CPUS=4
After going through the BIOS menu, I couldn't see that it had multi
threading support. Hence this parameter was set to 2. Anyways, even after
setting this to 4, the result is the same. All interrupts are delivered to CPU0.

-
Regards,
Ranjan


 Regards,

 Fabio.

2006/8/1, Ranjan Sinha <rnjn.sinha@xxxxxxxxx>:
>
 Hi,

I have an Intel dual core machine but all interrupts are received on CPU 0.

I have built kernel 2.6.15.7 and following is an excerpt from my config file

CONFIG_X86_GOOD_APIC=y
CONFIG_X86_INTEL_USERCOPY=y
CONFIG_X86_USE_PPRO_CHECKSUM=y
CONFIG_X86_TSC=y
CONFIG_HPET_TIMER=y
CONFIG_HPET_EMULATE_RTC=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
CONFIG_SCHED_SMT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_PREEMPT is not set
CONFIG_PREEMPT_BKL=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_X86_IO_APIC=y

Yet when I look at /proc/interrupts this is what I get

           CPU0       CPU1
  0:     171883          0    IO-APIC-edge  timer
  1:       3797          0    IO-APIC-edge  i8042
  8:          3          0    IO-APIC-edge  rtc
  9:          3          0   IO-APIC-level  acpi
  12:        240          0    IO-APIC-edge  i8042
  14:       8227          0    IO-APIC-edge  libata
  15:          2          0    IO-APIC-edge  libata
  50:          0          0   IO-APIC-level  uhci_hcd:usb3
  58:          0          0   IO-APIC-level  uhci_hcd:usb4
  66:       6748          0         PCI-MSI  eth0
185:          7          0   IO-APIC-level  yenta
225:        150          0   IO-APIC-level  uhci_hcd:usb1, ehci_hcd:usb5
233:      28122          0   IO-APIC-level  uhci_hcd:usb2, HDA Intel
NMI:          0          0
LOC:     171791     171790
ERR:          0
MIS:          0

Why is the interrupt count on CPU1 0? Have I missed something in the
kernel configuration file or is this how a dual core machine behave
actually.

-
Thanks and Regards,
Ranjan


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