On Sun, 2006-05-28 at 16:08 +0530, Muneeswaran P - TLS, Chennai wrote: > please please fix your email client to do "reply" properly. In fact your emailer is so broken in this regard that I'm going to no longer reply to you until you fix it ;-) > > why would it have to be uncachable? > > > > Processors keep copies of recently accessed memory areas in a fast, local > > cache; > > without this cache, reasonable performance is not possible. If the device > > changes an > > area of main memory, it is imperative that any processor caches covering > > that area be > > invalidated; otherwise the processor may work with an incorrect image of > > main memory, > > and data corruption results. > > I understand that; there are 2 basic designs here > 1) the CPU sniffs the bus and invalidates automatically (this is done on > x86 for example) > 2) the OS has to do it > > > Similarly, when the device reads data > > from main memory, any changes to that memory residing in processor caches > > must be > > flushed out first. > > In Linux, if you use the DMA API correctly (pci_map_* etc) then this > flushing is done for you automatically. Either by the API, or by the cpu > in case of a dma cache coherent CPU such as x86. This is why you need to > use the API, it takes care of this for you. > > I am using AMD athlon processor. > Basically, i allocated memory using kmalloc(). Then pci_map_single() call to > map that memory. > After bus master data transfer, i used pci_unmap_single() call. > If it is processor specific, then it will be a problem right. > Is it correct ? no. you may need to call pci_sync_* api but it's just fine. Just read Documentation/dma-mapping.txt file -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
