On Sun, 2006-05-28 at 14:38 +0530, Muneeswaran P - TLS, Chennai wrote: > > -----Original Message----- > From: Arjan van de Ven [mailto:arjan@xxxxxxxxxxxxx] > Sent: Saturday, May 27, 2006 6:58 PM > To: Muneeswaran P - TLS, Chennai > Cc: kernelnewbies@xxxxxxxxxxxx > Subject: Re: kernel memory allocation - please help me > > > On Sat, 2006-05-27 at 17:13 +0530, Muneeswaran P - TLS, Chennai wrote: > > Hi, > > > > Pls help me. > > > > I am writing device driver (kernel 2.6 ) for PCI-X card. > > > > Pls clarify the following doubts: > > 1. DPRAM is memory mapped to PCI-X card. BAR-0 is mapped to DPRAM. > > 2. I have to transfer data from main memory to DPRAM using bus > > master concept. > > > > 3. I have allocated main memory using kmalloc() call. How to make > > this main memory area as non-cacheable one ? > > why would it have to be uncachable? > > Processors keep copies of recently accessed memory areas in a fast, local > cache; > without this cache, reasonable performance is not possible. If the device > changes an > area of main memory, it is imperative that any processor caches covering > that area be > invalidated; otherwise the processor may work with an incorrect image of > main memory, > and data corruption results. I understand that; there are 2 basic designs here 1) the CPU sniffs the bus and invalidates automatically (this is done on x86 for example) 2) the OS has to do it > Similarly, when the device reads data > from main memory, any changes to that memory residing in processor caches > must be > flushed out first. In Linux, if you use the DMA API correctly (pci_map_* etc) then this flushing is done for you automatically. Either by the API, or by the cpu in case of a dma cache coherent CPU such as x86. This is why you need to use the API, it takes care of this for you. -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
