Re: enabling/disabling cache by the kernel

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On Thu, 13 Apr 2006 11:29:02 -0700
"Arun Srinivasan" <arunlkml@xxxxxxxxx> wrote:

> I was wondering when would we disable caching and use write through
> policy as their alternatives are always efficient. Will this feature
> be useful in multi-processor systems due to the cache incoherency
> problems?( Even then I suppose they have hardware-circuitry to
> efficiently address those issues right?) .

Of course, multiprocessor systems have cache coherency mechanisms (or
at least, the one I've been working on, which was a dual core MIPS
RM9200). You can see on http://en.wikipedia.org/wiki/Cache_coherency,
that there are multiple protocols to do so (MSI, MESI, MOSI, MOESI).

Sincerly,

Thomas
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