Hi Sanjay ... > Thanks guys. For me it looks more like to ease the job of memory > management rather than performance or if I am wrong, it depends on > the scenario. AFAIK, sometimes it is also done to satisfy architecture specific requirement. Page Global directory (PGD), Page Middle directory (PMD) entry and PTE (entry) are all placed in page aligned memory address so MMU can correctly fetch them during logical-linear-physical address translation. Other example is DMA transfer, AFAIK some device requires the data to be placed in page aligned address so the data transfer runs successfully. CMIIW people... regards, Mulyadi -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
