On Tue, 15 Nov 2005, Ivan Korzakow wrote:
Hi all ! I'm running a 2.6.14 linux on 96 MHz MIPS processor. I need to cope with a device that sends a byte of data every 50 microsecond through an UART with no FIFO. What would be the best (well, the least horrible) way to handle that ? The good point is that I know when the communication starts.
Auch, that will not be easy... I guess, you will be running to your platform's limit... Notice - no idea about your MIPS. Can you priorize interrupts? What't the average irq latency? How much stuff runs on your system apart from your data acquisition? Just think about it - 1 byte every 50 usec means 20kBps, that is, at least 200kbaud... What kind of UART is it? Just compare - "normal" (16550A - 16950...) UARTs usually go only as high as to 115200 baud and have (at least) 16 byte FIFO and hard- / software handshake... Can you use any sort of handshake? Without that, I think, you cannot guarantee you will always manage it. How critical is it if, say, 5% of your communication units (telegrams / blocks) are lost? Have CRC, packets are numbered?
What might give you some hope - do RT-Preemtion patches run on your platform?
One of the (horrible) idea I have : to freeze the system so that it deals only with the communication interrupts. But the communications can be quite long (under some conditions about one second), so I don't know what could be the consequences.
Might be the only reliable solution, or just poll your interrupt line...
Any idea, any help, any "good luck" will be welcomed !
Yeah, you'll need lots of good luck with this:-) Regards Guennadi --------------------------------- Guennadi Liakhovetski, Ph.D. DSA Daten- und Systemtechnik GmbH Pascalstr. 28 D-52076 Aachen Germany -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ FAQ: http://kernelnewbies.org/faq/
