RE: PCI memory cycles and accessing memory.

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Read the following article on PIC devices:
http://www.tldp.org/LDP/tlk/dd/pci.html

It tells something about, how PCI devices are given address by BIOS at
startup. It's the BIOS which actually allocate the addresses to PCI
device ports and then kernel can read the configuration registers of PIC
device to know the status and address space of device. Every PCI device
have the range of ports address which are valid for that device these
are set into configuration memory of PCI and if PIC sees any address on
system address bus between these range limits, it knows that control
command (on control bus) or data (on data bus) is ment for it.

Gaurav.



-----Original Message-----
From: kernelnewbies-bounce@xxxxxxxxxxxx
[mailto:kernelnewbies-bounce@xxxxxxxxxxxx] On Behalf Of Om
Sent: Tuesday, September 21, 2004 11:42 PM
To: kernelnewbies
Subject: PCI memory cycles and accessing memory.

hi all,
We are programming a non transparent bridge (plx6540cb) for linux 
(2.4.22) on opteron.

We programmed the BAR1 with an address (0x8000_0000). Set up the 
downstream access registers and addresses (all non prefetchable memory).

Now we would like to access the memory space on the secondary side of 
the bridge.

My questions are not specific to the above mentioned bridge. They are 
more basic. ;-)

* How does the Linux kernel know that 0x8000_0000 is allocated for this 
particular bridge? How exactly an access to 0x8000_0000 gets converted 
to memory cycles on PCI? What is the sequence of code functions.. etc. 
(just file/functions will suffice )

After assigning this address, we do request_mem_region() and ioremap(). 
The /proc/iomem shows this region as allocated to our driver as well. 
But I am clueless about the convertion of this address to PCI memory
cycles.

* What should be the functions that we should use to access the memory 
mapped regions? Is it inb() outb() readw() writew()..etc? Or access the 
memory by * operator would suffice?

Regards,
Om.

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