synchronization without hardware support ..

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hi all , 

i have one more doubt regarding mutual exclusion
wihout hardware support and sorry if it is too basic
to be asked on the list. i looked at the DEKKER's algo
refered by u people but as far as i understood it
works only for sequential memory model . 

what for processors  that use store buffer and partial
store ordering . if i do'nt have any hardware support
for atomic operation (some test-and-set operation , or
lock prefix or what ever..) how can i ensure the
atomicity of any operation ( such as gaining of spin
lock).


Thanx in advance .

Rgds,
pankaj chauhan 
 

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