>>>>> "Nir" == Nir Tzachar <tzachar@cs.bgu.ac.il> writes:
Nir> lets say we're talking about UMA machines. since each cpu's cache maps the
Nir> same memory, when one of them dirties its cache, all caches need to be
Nir> replenished (when containing the same address...) .
Nir> so, to avoid this, when the data structures are aligned to different
Nir> cache lines, no thrashing takes place.
Nir> am i correct?
yes
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