smp and cache

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hi all
i have a simple question, a bit hardware related: (intel/amd smp machines)
i know each cpu has an on-chip cache, but there are several cache
levels, so does each cpu has several levels or some of the levels are
shared among cpu's ???

if the cache is not shred, why is there still need to align cpu's specific
data of different cpus to different cache lines??

cheers.
========================================================================
nir.

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