Praveen Kumar wrote: > Hi all, > can anybody explain me the turning of page table (i386) when the kernel is loaded. > I have gone through > http://home.earthlink.net/~jknapka/linux-mm/vminit.html > but not able to understand very well that > how the it maps to physical memory using swapper_pg_dir and What is funda behind the > mapping memory 0 to 8MB > OK, I'll try :-) First, remember the following important facts: (1) All pointers in the compiled kernel refer to addresses > PAGE_OFFSET. That is, the kernel is linked under the assumption that its base address will be start_text (I think; I don't have the code on hand at the moment), which is defined to be PAGE_OFFSET+<some small constant, call it C>. (2) All the kernel bootstrap code is linked assuming that its base address is 0+C. head.S is part of the bootstrap code. It's running in protected mode with paging turned off, so all addresses are physical. In particular, the instruction pointer is fetching instructions based on physical address. The instruction that turns on paging (movl %eax, %cr0) is located, say, at some physical address A. As soon as we set the paging bit in cr0, paging is enabled, and starting at the very next instruction, all addressing, including instruction fetches, pass through the address translation mechanism (page tables). IOW, all address are henceforth virtual. That means that (a) we must have valid page tables, and (b) those tables must properly map the instruction pointer to the next instruction to be executed. That next instruction is physically located at address A+4 (the address immediately after the "movl %eax, %cr0" instruction), but from the point of view of all the kernel code -- which has been linked at PAGE_OFFSET -- that instruction is located at virtual address PAGE_OFFSET+(A+4). Turning on paging, however, does not magically change the value of EIP. The CPU fetches the next instruction from ***virtual*** address A+4; that instruction is the beginning of a short sequence that effectively relocates the instruction pointer to point to the code at PAGE_OFFSET+A+<something>. But since the CPU is, for those few instructions, fetching instructions based on physical addresses ***but having those instructions pass through address translation***, we must ensure that both the physical addresses and the virtual addresses are (a) valid virtual addresses, and (b) point to the same code. That means that at the very least, the initial page tables must map virtual address PAGE_OFFSET+(A+4) to physical address A+4, and must map virtual address A+4 to physical address A+4. This dual mapping for the first 8MB of physical RAM is exactly what the initial page tables accomplish. The 8MB initally mapped is more-or-less arbitrary; it's certain that no bootable kernel will be greater than 8MB in size. The identity mapping is discarded when the MM system gets initialized. Does that help? Cheers, -- Joe > Thanks in advance > praveen > > -- > > You cannot be lonely if you like the person > you're alone with. > ~Wayne Dyer > kumarp@hss.hns.com > praveen_kr5@hotmail.com > > _______________________________________________ > Sign-up for your own FREE Personalized E-mail at Mail.com > http://www.mail.com/?sr=signup > > 1 cent a minute calls anywhere in the U.S.! > > http://www.getpennytalk.com/cgi-bin/adforward.cgi?p_key=RG9853KJ&url=http://www.getpennytalk.com > > -- > Kernelnewbies: Help each other learn about the Linux kernel. > Archive: http://mail.nl.linux.org/kernelnewbies/ > IRC Channel: irc.openprojects.net / #kernelnewbies > Web Page: http://www.kernelnewbies.org/ -- Kernelnewbies: Help each other learn about the Linux kernel. Archive: http://mail.nl.linux.org/kernelnewbies/ IRC Channel: irc.openprojects.net / #kernelnewbies Web Page: http://www.kernelnewbies.org/
