On Tue, Jun 07, 2016 at 08:23:15AM -0700, Paul E. McKenney wrote: > and if the hardware is not excessively clever (bad bet, by the > way, long term), This ^ > > Is there something else than conditional move instructions that could > > come to play here? Obviously a much smarter CPU could evaluate all the > > jumps and come to the conclusion that the write to c is never depending > > on the load from a, but is this implemented somewhere in hardware? > > I don't know of any hardware that does that, but given that conditional > moves are supported by some weakly ordered hardware, it looks to me > that we are stuck with the possibility of "a"-"c" reordering. Is why I'm scared of relying on the non-condition. The if and else branches are obviously dependent on the completion of the load; anything after that, not so much. You could construct an argument against this program order speculation based on interrupts, which should not observe the stores out of order etc.. but if the hardware is that clever, it can also abort the entire speculation on interrupt (much like hardware transactions already can). So even if today no hardware is this clever (and that isn't proven) there's nothing saying it will not ever be. This is why I really do not want to advertise and or rely on this behaviour. -- To unsubscribe from this list: send the line "unsubscribe netfilter-devel" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
