On Mon, Jun 06, 2016 at 06:08:36PM +0200, Peter Zijlstra wrote:
> On Thu, Jun 02, 2016 at 06:57:00PM +0100, Will Deacon wrote:
> > > This 'replaces' commit:
> > >
> > > 54cf809b9512 ("locking,qspinlock: Fix spin_is_locked() and spin_unlock_wait()")
> > >
> > > and seems to still work with the test case from that thread while
> > > getting rid of the extra barriers.
>
> New version :-)
>
> This one has moar comments; and also tries to address an issue with
> xchg_tail(), which is its own consumer. Paul, Will said you'd love the
> address dependency through union members :-)
>
> (I should split this in at least 3 patches I suppose)
>
> ARM64 and PPC should provide private versions of is_locked and
> unlock_wait; because while this one deals with the unordered store as
> per qspinlock construction, it still relies on cmpxchg_acquire()'s store
> being visible.
>
[snip]
> diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
> index ce2f75e32ae1..e1c29d352e0e 100644
> --- a/kernel/locking/qspinlock.c
> +++ b/kernel/locking/qspinlock.c
> @@ -395,6 +395,8 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
> * pending stuff.
> *
> * p,*,* -> n,*,*
> + *
> + * RELEASE, such that the stores to @node must be complete.
> */
> old = xchg_tail(lock, tail);
> next = NULL;
> @@ -405,6 +407,15 @@ void queued_spin_lock_slowpath(struct qspinlock *lock, u32 val)
> */
> if (old & _Q_TAIL_MASK) {
> prev = decode_tail(old);
> + /*
> + * The above xchg_tail() is also load of @lock which generates,
> + * through decode_tail(), a pointer.
> + *
> + * The address dependency matches the RELEASE of xchg_tail()
> + * such that the access to @prev must happen after.
> + */
> + smp_read_barrier_depends();
Should this barrier be put before decode_tail()? Because it's the
dependency old -> prev that we want to protect here.
Regards,
Boqun
> +
> WRITE_ONCE(prev->next, node);
>
> pv_wait_node(node, prev);
[snip]
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