The patch titled
arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear value
has been added to the -mm tree. Its filename is
fsl-rio-correct-iecsr-register-clear-value.patch
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------------------------------------------------------
Subject: arch/powerpc/sysdev/fsl_rio.c: correct IECSR register clear value
From: Liu Gang-B34182 <B34182@xxxxxxxxxxxxx>
The RETE bit in IECSR is cleared by writing a 1 to it.
Signed-off-by: Liu Gang <Gang.Liu@xxxxxxxxxxxxx>
Cc: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
Cc: Kumar Gala <galak@xxxxxxxxxxxxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
---
arch/powerpc/sysdev/fsl_rio.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff -puN arch/powerpc/sysdev/fsl_rio.c~fsl-rio-correct-iecsr-register-clear-value arch/powerpc/sysdev/fsl_rio.c
--- a/arch/powerpc/sysdev/fsl_rio.c~fsl-rio-correct-iecsr-register-clear-value
+++ a/arch/powerpc/sysdev/fsl_rio.c
@@ -54,6 +54,7 @@
#define ODSR_CLEAR 0x1c00
#define LTLEECSR_ENABLE_ALL 0xFFC000FC
#define ESCSR_CLEAR 0x07120204
+#define IECSR_CLEAR 0x80000000
#define RIO_PORT1_EDCSR 0x0640
#define RIO_PORT2_EDCSR 0x0680
@@ -1089,11 +1090,11 @@ static void port_error_handler(struct ri
if (offset == 0) {
out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
- out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
+ out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), IECSR_CLEAR);
out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
} else {
out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
- out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
+ out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), IECSR_CLEAR);
out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
}
}
_
Patches currently in -mm which might be from B34182@xxxxxxxxxxxxx are
fsl-rio-correct-iecsr-register-clear-value.patch
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