The patch titled
synclink_gt: add serial bit order control
has been added to the -mm tree. Its filename is
synclink_gt-add-serial-bit-order-control.patch
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------------------------------------------------------
Subject: synclink_gt: add serial bit order control
From: Paul Fulghum <paulkf@xxxxxxxxxxxxx>
Add control of hardware serial bit order between LSB first
(default/standard) and MSB first.
Signed-off-by: Paul Fulghum <paulkf@xxxxxxxxxxxxx>
Cc: Alan Cox <alan@xxxxxxxxxxxxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
---
drivers/char/synclink_gt.c | 2 ++
include/linux/synclink.h | 1 +
2 files changed, 3 insertions(+)
diff -puN drivers/char/synclink_gt.c~synclink_gt-add-serial-bit-order-control drivers/char/synclink_gt.c
--- a/drivers/char/synclink_gt.c~synclink_gt-add-serial-bit-order-control
+++ a/drivers/char/synclink_gt.c
@@ -4443,6 +4443,8 @@ static void msc_set_vcr(struct slgt_info
break;
}
+ if (info->if_mode & MGSL_INTERFACE_MSB_FIRST)
+ val |= BIT4;
if (info->signals & SerialSignal_DTR)
val |= BIT3;
if (info->signals & SerialSignal_RTS)
diff -puN include/linux/synclink.h~synclink_gt-add-serial-bit-order-control include/linux/synclink.h
--- a/include/linux/synclink.h~synclink_gt-add-serial-bit-order-control
+++ a/include/linux/synclink.h
@@ -136,6 +136,7 @@
#define MGSL_INTERFACE_RTS_EN 0x10
#define MGSL_INTERFACE_LL 0x20
#define MGSL_INTERFACE_RL 0x40
+#define MGSL_INTERFACE_MSB_FIRST 0x80
typedef struct _MGSL_PARAMS
{
_
Patches currently in -mm which might be from paulkf@xxxxxxxxxxxxx are
synclink_gt-add-rx-dma-buffer-fill-level-control.patch
synclink_gt-add-serial-bit-order-control.patch
synclink_gt-improve-tiocoutq-accuracy.patch
synclink_gt-improve-and-simplify-write-method.patch
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