The patch titled
x86_64-add-ioapic-nmi-support-fix-3
has been added to the -mm tree. Its filename is
x86_64-add-ioapic-nmi-support-fix-3.patch
*** Remember to use Documentation/SubmitChecklist when testing your code ***
See http://www.zip.com.au/~akpm/linux/patches/stuff/added-to-mm.txt to find
out what to do about this
------------------------------------------------------
Subject: x86_64-add-ioapic-nmi-support-fix-3
From: John Keller <jpk@xxxxxxx>
Place all the IOACPI NMI support code under CONFIG_ACPI
to clear up build errors with certain configs.
Signed-off-by: John Keller <jpk@xxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
---
arch/x86_64/kernel/io_apic.c | 77 +++++++++++++++++----------------
1 files changed, 40 insertions(+), 37 deletions(-)
diff -puN arch/x86_64/kernel/io_apic.c~x86_64-add-ioapic-nmi-support-fix-3 arch/x86_64/kernel/io_apic.c
--- a/arch/x86_64/kernel/io_apic.c~x86_64-add-ioapic-nmi-support-fix-3
+++ a/arch/x86_64/kernel/io_apic.c
@@ -75,6 +75,10 @@ struct irq_cfg irq_cfg[NR_IRQS] __read_m
[15] = { .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, },
};
+#ifdef CONFIG_ACPI
+static void setup_ioapic_nmi_irq(int ioapic, int pin,
+ struct IO_APIC_route_entry *entry);
+#endif
static int assign_irq_vector(int irq, cpumask_t mask);
#define __apicdebuginit __init
@@ -1167,9 +1171,6 @@ void __apicdebuginit print_PIC(void)
#endif /* 0 */
-static void setup_ioapic_nmi_irq(int ioapic, int pin,
- struct IO_APIC_route_entry *entry);
-
static void __init enable_IO_APIC(void)
{
union IO_APIC_reg_01 reg_01;
@@ -1210,8 +1211,10 @@ static void __init enable_IO_APIC(void)
continue;
}
+#ifdef CONFIG_ACPI
if (entry.delivery_mode == dest_NMI)
setup_ioapic_nmi_irq(apic, pin, &entry);
+#endif
}
}
@@ -1585,40 +1588,6 @@ static void setup_nmi (void)
printk(" done.\n");
}
-#define disable_nmi_ioapic mask_IO_APIC_irq
-#define enable_nmi_ioapic unmask_IO_APIC_irq
-
-static struct irq_chip nmi_ioapic_chip __read_mostly = {
- .name = "IO-APIC NMI",
- .enable = enable_nmi_ioapic,
- .disable = disable_nmi_ioapic,
- .mask = mask_IO_APIC_irq,
- .unmask = unmask_IO_APIC_irq,
-};
-
-void __init setup_ioapic_nmi_irq(int apic, int pin,
- struct IO_APIC_route_entry *entry)
-{
- int irq;
-
- entry->dest_mode = INT_DEST_MODE;
- entry->dest = cpu_mask_to_apicid(TARGET_CPUS);
- ioapic_write_entry(apic, pin, *entry);
-
- irq = mp_apic_pin_to_gsi(apic, pin);
-
- /* Setup pin_2_irq[irq] entry */
- add_pin_to_irq(irq, apic, pin);
-
- irq_desc[irq].status = IRQ_NOREQUEST | IRQ_NO_BALANCING;
- if (!entry->mask) {
- irq_desc[irq].status &= ~IRQ_DISABLED;
- irq_desc[irq].depth = 0;
- }
-
- set_irq_chip(irq, &nmi_ioapic_chip);
-}
-
/*
* This looks a bit hackish but it's about the only one way of sending
* a few INTA cycles to 8259As and any associated glue logic. ICR does
@@ -2225,6 +2194,40 @@ void __init io_apic_set_nmi_src_irq(int
ioapic_write_entry(ioapic, pin, entry);
}
+#define disable_nmi_ioapic mask_IO_APIC_irq
+#define enable_nmi_ioapic unmask_IO_APIC_irq
+
+static struct irq_chip nmi_ioapic_chip __read_mostly = {
+ .name = "IO-APIC NMI",
+ .enable = enable_nmi_ioapic,
+ .disable = disable_nmi_ioapic,
+ .mask = mask_IO_APIC_irq,
+ .unmask = unmask_IO_APIC_irq,
+};
+
+void __init setup_ioapic_nmi_irq(int apic, int pin,
+ struct IO_APIC_route_entry *entry)
+{
+ int irq;
+
+ entry->dest_mode = INT_DEST_MODE;
+ entry->dest = cpu_mask_to_apicid(TARGET_CPUS);
+ ioapic_write_entry(apic, pin, *entry);
+
+ irq = mp_apic_pin_to_gsi(apic, pin);
+
+ /* Setup pin_2_irq[irq] entry */
+ add_pin_to_irq(irq, apic, pin);
+
+ irq_desc[irq].status = IRQ_NOREQUEST | IRQ_NO_BALANCING;
+ if (!entry->mask) {
+ irq_desc[irq].status &= ~IRQ_DISABLED;
+ irq_desc[irq].depth = 0;
+ }
+
+ set_irq_chip(irq, &nmi_ioapic_chip);
+}
+
#endif /* CONFIG_ACPI */
_
Patches currently in -mm which might be from jpk@xxxxxxx are
sn-correct-rom-resource-length-for-bios-copy.patch
x86_64-add-ioapic-nmi-support.patch
x86_64-add-ioapic-nmi-support-fix.patch
x86_64-add-ioapic-nmi-support-fix-2.patch
x86_64-add-ioapic-nmi-support-fix-3.patch
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