The patch titled
revert gregkh-usb-usb-implement-support-for-split-endian-ohci
has been added to the -mm tree. Its filename is
revert-gregkh-usb-usb-implement-support-for-split-endian-ohci.patch
See http://www.zip.com.au/~akpm/linux/patches/stuff/added-to-mm.txt to find
out what to do about this
------------------------------------------------------
Subject: revert gregkh-usb-usb-implement-support-for-split-endian-ohci
From: Andrew Morton <akpm@xxxxxxxx>
i386 allmodconfig:
In file included from drivers/usb/host/ohci-hcd.c:78:
drivers/usb/host/ohci.h: In function '_ohci_readl':
drivers/usb/host/ohci.h:509: warning: implicit declaration of function 'readl_be'
drivers/usb/host/ohci.h: In function '_ohci_writel':
drivers/usb/host/ohci.h:517: warning: implicit declaration of function 'writel_be'
Cc: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
Cc: Greg KH <greg@xxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxx>
---
drivers/usb/host/Kconfig | 10 --
drivers/usb/host/ohci-pci.c | 26 -----
drivers/usb/host/ohci-ppc-soc.c | 2
drivers/usb/host/ohci.h | 147 ++++++++++--------------------
4 files changed, 55 insertions(+), 130 deletions(-)
diff -puN drivers/usb/host/Kconfig~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci drivers/usb/host/Kconfig
--- a/drivers/usb/host/Kconfig~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci
+++ a/drivers/usb/host/Kconfig
@@ -106,8 +106,7 @@ config USB_OHCI_HCD_PPC_SOC
bool "OHCI support for on-chip PPC USB controller"
depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
default y
- select USB_OHCI_BIG_ENDIAN_DESC
- select USB_OHCI_BIG_ENDIAN_MMIO
+ select USB_OHCI_BIG_ENDIAN
---help---
Enables support for the USB controller on the MPC52xx or
STB03xxx processor chip. If unsure, say Y.
@@ -142,12 +141,7 @@ config USB_OHCI_HCD_PCI
Enables support for PCI-bus plug-in USB controller cards.
If unsure, say Y.
-config USB_OHCI_BIG_ENDIAN_DESC
- bool
- depends on USB_OHCI_HCD
- default n
-
-config USB_OHCI_BIG_ENDIAN_MMIO
+config USB_OHCI_BIG_ENDIAN
bool
depends on USB_OHCI_HCD
default n
diff -puN drivers/usb/host/ohci-pci.c~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci drivers/usb/host/ohci-pci.c
--- a/drivers/usb/host/ohci-pci.c~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci
+++ a/drivers/usb/host/ohci-pci.c
@@ -85,27 +85,6 @@ static int __devinit ohci_quirk_zfmicro(
return 0;
}
-/* Check for Toshiba SCC OHCI which has big endian registers
- * and little endian in memory data structures
- */
-static int __devinit ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
-{
- struct ohci_hcd *ohci = hcd_to_ohci (hcd);
-
- /* That chip is only present in the southbridge of some
- * cell based platforms which are supposed to select
- * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
- * that was the case though.
- */
-#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
- ohci->flags |= OHCI_QUIRK_BE_MMIO;
- ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
- return 0;
-#else
- ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
- return -ENXIO;
-#endif
-}
/* List of quirks for OHCI */
static const struct pci_device_id ohci_pci_quirks[] = {
@@ -125,14 +104,9 @@ static const struct pci_device_id ohci_p
PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
.driver_data = (unsigned long)ohci_quirk_zfmicro,
},
- {
- PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
- .driver_data = (unsigned long)ohci_quirk_toshiba_scc,
- },
/* FIXME for some of the early AMD 760 southbridges, OHCI
* won't work at all. blacklist them.
*/
-
{},
};
diff -puN drivers/usb/host/ohci-ppc-soc.c~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci drivers/usb/host/ohci-ppc-soc.c
--- a/drivers/usb/host/ohci-ppc-soc.c~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci
+++ a/drivers/usb/host/ohci-ppc-soc.c
@@ -72,7 +72,7 @@ static int usb_hcd_ppc_soc_probe(const s
}
ohci = hcd_to_ohci(hcd);
- ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC;
+ ohci->flags |= OHCI_BIG_ENDIAN;
ohci_hcd_init(ohci);
retval = usb_add_hcd(hcd, irq, IRQF_DISABLED);
diff -puN drivers/usb/host/ohci.h~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci drivers/usb/host/ohci.h
--- a/drivers/usb/host/ohci.h~revert-gregkh-usb-usb-implement-support-for-split-endian-ohci
+++ a/drivers/usb/host/ohci.h
@@ -394,9 +394,8 @@ struct ohci_hcd {
#define OHCI_QUIRK_AMD756 0x01 /* erratum #4 */
#define OHCI_QUIRK_SUPERIO 0x02 /* natsemi */
#define OHCI_QUIRK_INITRESET 0x04 /* SiS, OPTi, ... */
-#define OHCI_QUIRK_BE_DESC 0x08 /* BE descriptors */
-#define OHCI_QUIRK_BE_MMIO 0x10 /* BE registers */
-#define OHCI_QUIRK_ZFMICRO 0x20 /* Compaq ZFMicro chipset*/
+#define OHCI_BIG_ENDIAN 0x08 /* big endian HC */
+#define OHCI_QUIRK_ZFMICRO 0x10 /* Compaq ZFMicro chipset*/
// there are also chip quirks/bugs in init logic
};
@@ -440,156 +439,117 @@ static inline struct usb_hcd *ohci_to_hc
* a minority (notably the IBM STB04XXX and the Motorola MPC5200
* processors) implement them in big endian format.
*
- * In addition some more exotic implementations like the Toshiba
- * Spider (aka SCC) cell southbridge are "mixed" endian, that is,
- * they have a different endianness for registers vs. in-memory
- * descriptors.
- *
* This attempts to support either format at compile time without a
* runtime penalty, or both formats with the additional overhead
* of checking a flag bit.
- *
- * That leads to some tricky Kconfig rules howevber. There are
- * different defaults based on some arch/ppc platforms, though
- * the basic rules are:
- *
- * Controller type Kconfig options needed
- * --------------- ----------------------
- * little endian CONFIG_USB_OHCI_LITTLE_ENDIAN
- *
- * fully big endian CONFIG_USB_OHCI_BIG_ENDIAN_DESC _and_
- * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
- *
- * mixed endian CONFIG_USB_OHCI_LITTLE_ENDIAN _and_
- * CONFIG_USB_OHCI_BIG_ENDIAN_{MMIO,DESC}
- *
- * (If you have a mixed endian controller, you -must- also define
- * CONFIG_USB_OHCI_LITTLE_ENDIAN or things will not work when building
- * both your mixed endian and a fully big endian controller support in
- * the same kernel image).
*/
-#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_DESC
-#ifdef CONFIG_USB_OHCI_LITTLE_ENDIAN
-#define big_endian_desc(ohci) (ohci->flags & OHCI_QUIRK_BE_DESC)
-#else
-#define big_endian_desc(ohci) 1 /* only big endian */
-#endif
-#else
-#define big_endian_desc(ohci) 0 /* only little endian */
-#endif
+#ifdef CONFIG_USB_OHCI_BIG_ENDIAN
-#ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
#ifdef CONFIG_USB_OHCI_LITTLE_ENDIAN
-#define big_endian_mmio(ohci) (ohci->flags & OHCI_QUIRK_BE_MMIO)
-#else
-#define big_endian_mmio(ohci) 1 /* only big endian */
-#endif
+#define big_endian(ohci) (ohci->flags & OHCI_BIG_ENDIAN) /* either */
#else
-#define big_endian_mmio(ohci) 0 /* only little endian */
+#define big_endian(ohci) 1 /* only big endian */
#endif
/*
* Big-endian read/write functions are arch-specific.
* Other arches can be added if/when they're needed.
- *
- * REVISIT: arch/powerpc now has readl/writel_be, so the
- * definition below can die once the STB04xxx support is
- * finally ported over.
*/
-#if defined(CONFIG_PPC) && !defined(CONFIG_PPC_MERGE)
+#if defined(CONFIG_PPC)
#define readl_be(addr) in_be32((__force unsigned *)addr)
#define writel_be(val, addr) out_be32((__force unsigned *)addr, val)
#endif
-static inline unsigned int _ohci_readl (const struct ohci_hcd *ohci,
- __hc32 __iomem * regs)
+static inline unsigned int ohci_readl (const struct ohci_hcd *ohci,
+ __hc32 __iomem * regs)
{
- return big_endian_mmio(ohci) ?
- readl_be ((__force u32 *)regs) :
- readl ((__force u32 *)regs);
+ return big_endian(ohci) ? readl_be (regs) : readl ((__force u32 *)regs);
}
-static inline void _ohci_writel (const struct ohci_hcd *ohci,
- const unsigned int val, __hc32 __iomem *regs)
+static inline void ohci_writel (const struct ohci_hcd *ohci,
+ const unsigned int val, __hc32 __iomem *regs)
{
- big_endian_mmio(ohci) ?
- writel_be (val, (__force u32 *)regs) :
- writel (val, (__force u32 *)regs);
+ big_endian(ohci) ? writel_be (val, regs) :
+ writel (val, (__force u32 *)regs);
}
+#else /* !CONFIG_USB_OHCI_BIG_ENDIAN */
+
+#define big_endian(ohci) 0 /* only little endian */
+
#ifdef CONFIG_ARCH_LH7A404
-/* Marc Singer: at the time this code was written, the LH7A404
- * had a problem reading the USB host registers. This
- * implementation of the ohci_readl function performs the read
- * twice as a work-around.
- */
-#define ohci_readl(o,r) (_ohci_readl(o,r),_ohci_readl(o,r))
-#define ohci_writel(o,v,r) _ohci_writel(o,v,r)
+ /* Marc Singer: at the time this code was written, the LH7A404
+ * had a problem reading the USB host registers. This
+ * implementation of the ohci_readl function performs the read
+ * twice as a work-around.
+ */
+static inline unsigned int
+ohci_readl (const struct ohci_hcd *ohci, const __hc32 *regs)
+{
+ *(volatile __force unsigned int*) regs;
+ return *(volatile __force unsigned int*) regs;
+}
#else
-#define ohci_readl(o,r) _ohci_readl(o,r)
-#define ohci_writel(o,v,r) _ohci_writel(o,v,r)
+ /* Standard version of ohci_readl uses standard, platform
+ * specific implementation. */
+static inline unsigned int
+ohci_readl (const struct ohci_hcd *ohci, __hc32 __iomem * regs)
+{
+ return readl(regs);
+}
#endif
+static inline void ohci_writel (const struct ohci_hcd *ohci,
+ const unsigned int val, __hc32 __iomem *regs)
+{
+ writel (val, regs);
+}
+
+#endif /* !CONFIG_USB_OHCI_BIG_ENDIAN */
/*-------------------------------------------------------------------------*/
/* cpu to ohci */
static inline __hc16 cpu_to_hc16 (const struct ohci_hcd *ohci, const u16 x)
{
- return big_endian_desc(ohci) ?
- (__force __hc16)cpu_to_be16(x) :
- (__force __hc16)cpu_to_le16(x);
+ return big_endian(ohci) ? (__force __hc16)cpu_to_be16(x) : (__force __hc16)cpu_to_le16(x);
}
static inline __hc16 cpu_to_hc16p (const struct ohci_hcd *ohci, const u16 *x)
{
- return big_endian_desc(ohci) ?
- cpu_to_be16p(x) :
- cpu_to_le16p(x);
+ return big_endian(ohci) ? cpu_to_be16p(x) : cpu_to_le16p(x);
}
static inline __hc32 cpu_to_hc32 (const struct ohci_hcd *ohci, const u32 x)
{
- return big_endian_desc(ohci) ?
- (__force __hc32)cpu_to_be32(x) :
- (__force __hc32)cpu_to_le32(x);
+ return big_endian(ohci) ? (__force __hc32)cpu_to_be32(x) : (__force __hc32)cpu_to_le32(x);
}
static inline __hc32 cpu_to_hc32p (const struct ohci_hcd *ohci, const u32 *x)
{
- return big_endian_desc(ohci) ?
- cpu_to_be32p(x) :
- cpu_to_le32p(x);
+ return big_endian(ohci) ? cpu_to_be32p(x) : cpu_to_le32p(x);
}
/* ohci to cpu */
static inline u16 hc16_to_cpu (const struct ohci_hcd *ohci, const __hc16 x)
{
- return big_endian_desc(ohci) ?
- be16_to_cpu((__force __be16)x) :
- le16_to_cpu((__force __le16)x);
+ return big_endian(ohci) ? be16_to_cpu((__force __be16)x) : le16_to_cpu((__force __le16)x);
}
static inline u16 hc16_to_cpup (const struct ohci_hcd *ohci, const __hc16 *x)
{
- return big_endian_desc(ohci) ?
- be16_to_cpup((__force __be16 *)x) :
- le16_to_cpup((__force __le16 *)x);
+ return big_endian(ohci) ? be16_to_cpup((__force __be16 *)x) : le16_to_cpup((__force __le16 *)x);
}
static inline u32 hc32_to_cpu (const struct ohci_hcd *ohci, const __hc32 x)
{
- return big_endian_desc(ohci) ?
- be32_to_cpu((__force __be32)x) :
- le32_to_cpu((__force __le32)x);
+ return big_endian(ohci) ? be32_to_cpu((__force __be32)x) : le32_to_cpu((__force __le32)x);
}
static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x)
{
- return big_endian_desc(ohci) ?
- be32_to_cpup((__force __be32 *)x) :
- le32_to_cpup((__force __le32 *)x);
+ return big_endian(ohci) ? be32_to_cpup((__force __be32 *)x) : le32_to_cpup((__force __le32 *)x);
}
/*-------------------------------------------------------------------------*/
@@ -597,9 +557,6 @@ static inline u32 hc32_to_cpup (const st
/* HCCA frame number is 16 bits, but is accessed as 32 bits since not all
* hardware handles 16 bit reads. That creates a different confusion on
* some big-endian SOC implementations. Same thing happens with PSW access.
- *
- * FIXME: Deal with that as a runtime quirk when STB03xxx is ported over
- * to arch/powerpc
*/
#ifdef CONFIG_STB03xxx
@@ -611,7 +568,7 @@ static inline u32 hc32_to_cpup (const st
static inline u16 ohci_frame_no(const struct ohci_hcd *ohci)
{
u32 tmp;
- if (big_endian_desc(ohci)) {
+ if (big_endian(ohci)) {
tmp = be32_to_cpup((__force __be32 *)&ohci->hcca->frame_no);
tmp >>= OHCI_BE_FRAME_NO_SHIFT;
} else
@@ -623,7 +580,7 @@ static inline u16 ohci_frame_no(const st
static inline __hc16 *ohci_hwPSWp(const struct ohci_hcd *ohci,
const struct td *td, int index)
{
- return (__hc16 *)(big_endian_desc(ohci) ?
+ return (__hc16 *)(big_endian(ohci) ?
&td->hwPSW[index ^ 1] : &td->hwPSW[index]);
}
_
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nokia-e70-is-an-unusual-device.patch
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