The patch titled Subject: powerpc/e500: remove enc and ind fields from struct mmu_psize_def has been added to the -mm mm-unstable branch. Its filename is powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def.patch This patch will shortly appear at https://git.kernel.org/pub/scm/linux/kernel/git/akpm/25-new.git/tree/patches/powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def.patch This patch will later appear in the mm-unstable branch at git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Before you just go and hit "reply", please: a) Consider who else should be cc'ed b) Prefer to cc a suitable mailing list as well c) Ideally: find the original patch on the mailing list and do a reply-to-all to that, adding suitable additional cc's *** Remember to use Documentation/process/submit-checklist.rst when testing your code *** The -mm tree is included into linux-next via the mm-everything branch at git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm and is updated there every 2-3 working days ------------------------------------------------------ From: Christophe Leroy <christophe.leroy@xxxxxxxxxx> Subject: powerpc/e500: remove enc and ind fields from struct mmu_psize_def Date: Tue, 2 Jul 2024 15:51:27 +0200 enc field is hidden behind BOOK3E_PAGESZ_XX macros, and when you look closer you realise that this field is nothing else than the value of shift minus ten. So remove enc field and calculate tsize from shift field. Also remove inc field which is unused. Link: https://lkml.kernel.org/r/e99136779b5b0829c2c60d37f305a1410c65cf9b.1719928057.git.christophe.leroy@xxxxxxxxxx Signed-off-by: Christophe Leroy <christophe.leroy@xxxxxxxxxx> Reviewed-by: Oscar Salvador <osalvador@xxxxxxx> Cc: Jason Gunthorpe <jgg@xxxxxxxxxx> Cc: Michael Ellerman <mpe@xxxxxxxxxxxxxx> Cc: Nicholas Piggin <npiggin@xxxxxxxxx> Cc: Peter Xu <peterx@xxxxxxxxxx> Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx> --- arch/powerpc/include/asm/nohash/mmu-e500.h | 3 --- arch/powerpc/mm/nohash/book3e_pgtable.c | 4 ++-- arch/powerpc/mm/nohash/tlb.c | 9 +-------- arch/powerpc/mm/nohash/tlb_64e.c | 2 +- 4 files changed, 4 insertions(+), 14 deletions(-) --- a/arch/powerpc/include/asm/nohash/mmu-e500.h~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +++ a/arch/powerpc/include/asm/nohash/mmu-e500.h @@ -244,14 +244,11 @@ typedef struct { /* Page size definitions, common between 32 and 64-bit * * shift : is the "PAGE_SHIFT" value for that page size - * penc : is the pte encoding mask * */ struct mmu_psize_def { unsigned int shift; /* number of bits */ - unsigned int enc; /* PTE encoding */ - unsigned int ind; /* Corresponding indirect page size shift */ unsigned int flags; #define MMU_PAGE_SIZE_DIRECT 0x1 /* Supported as a direct size */ #define MMU_PAGE_SIZE_INDIRECT 0x2 /* Supported as an indirect size */ --- a/arch/powerpc/mm/nohash/book3e_pgtable.c~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +++ a/arch/powerpc/mm/nohash/book3e_pgtable.c @@ -29,10 +29,10 @@ int __meminit vmemmap_create_mapping(uns _PAGE_KERNEL_RW; /* PTEs only contain page size encodings up to 32M */ - BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].enc > 0xf); + BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].shift - 10 > 0xf); /* Encode the size in the PTE */ - flags |= mmu_psize_defs[mmu_vmemmap_psize].enc << 8; + flags |= (mmu_psize_defs[mmu_vmemmap_psize].shift - 10) << 8; /* For each PTE for that area, map things. Note that we don't * increment phys because all PTEs are of the large size and --- a/arch/powerpc/mm/nohash/tlb_64e.c~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +++ a/arch/powerpc/mm/nohash/tlb_64e.c @@ -53,7 +53,7 @@ int extlb_level_exc; */ void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address) { - int tsize = mmu_psize_defs[mmu_pte_psize].enc; + int tsize = mmu_psize_defs[mmu_pte_psize].shift - 10; if (book3e_htw_mode != PPC_HTW_NONE) { unsigned long start = address & PMD_MASK; --- a/arch/powerpc/mm/nohash/tlb.c~powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def +++ a/arch/powerpc/mm/nohash/tlb.c @@ -53,37 +53,30 @@ struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = { [MMU_PAGE_4K] = { .shift = 12, - .enc = BOOK3E_PAGESZ_4K, }, [MMU_PAGE_2M] = { .shift = 21, - .enc = BOOK3E_PAGESZ_2M, }, [MMU_PAGE_4M] = { .shift = 22, - .enc = BOOK3E_PAGESZ_4M, }, [MMU_PAGE_16M] = { .shift = 24, - .enc = BOOK3E_PAGESZ_16M, }, [MMU_PAGE_64M] = { .shift = 26, - .enc = BOOK3E_PAGESZ_64M, }, [MMU_PAGE_256M] = { .shift = 28, - .enc = BOOK3E_PAGESZ_256M, }, [MMU_PAGE_1G] = { .shift = 30, - .enc = BOOK3E_PAGESZ_1GB, }, }; static inline int mmu_get_tsize(int psize) { - return mmu_psize_defs[psize].enc; + return mmu_psize_defs[psize].shift - 10; } #else static inline int mmu_get_tsize(int psize) _ Patches currently in -mm which might be from christophe.leroy@xxxxxxxxxx are mm-define-__pte_leaf_size-to-also-take-a-pmd-entry.patch mm-provide-mm_struct-and-address-to-huge_ptep_get.patch powerpc-mm-remove-_page_psize.patch powerpc-mm-fix-__find_linux_pte-on-32-bits-with-pmd-leaf-entries.patch powerpc-mm-allow-hugepages-without-hugepd.patch powerpc-8xx-fix-size-given-to-set_huge_pte_at.patch powerpc-8xx-rework-support-for-8m-pages-using-contiguous-pte-entries.patch powerpc-8xx-simplify-struct-mmu_psize_def.patch powerpc-e500-remove-enc-and-ind-fields-from-struct-mmu_psize_def.patch powerpc-e500-switch-to-64-bits-pgd-on-85xx-32-bits.patch powerpc-e500-encode-hugepage-size-in-pte-bits.patch powerpc-e500-dont-pre-check-write-access-on-data-tlb-error.patch powerpc-e500-free-r10-for-find_pte.patch powerpc-e500-use-contiguous-pmd-instead-of-hugepd.patch powerpc-64s-use-contiguous-pmd-pud-instead-of-hugepd.patch powerpc-mm-remove-hugepd-leftovers.patch mm-remove-config_arch_has_hugepd.patch