From: Mike Rapoport <rppt@xxxxxxxxxxxxx> Subject: mm: consolidate pgtable_cache_init() and pgd_cache_init() Both pgtable_cache_init() and pgd_cache_init() are used to initialize kmem cache for page table allocations on several architectures that do not use PAGE_SIZE tables for one or more levels of the page table hierarchy. Most architectures do not implement these functions and use __weak default NOP implementation of pgd_cache_init(). Since there is no such default for pgtable_cache_init(), its empty stub is duplicated among most architectures. Rename the definitions of pgd_cache_init() to pgtable_cache_init() and drop empty stubs of pgtable_cache_init(). Link: http://lkml.kernel.org/r/1566457046-22637-1-git-send-email-rppt@xxxxxxxxxxxxx Signed-off-by: Mike Rapoport <rppt@xxxxxxxxxxxxx> Acked-by: Will Deacon <will@xxxxxxxxxx> [arm64] Acked-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx> [x86] Cc: Catalin Marinas <catalin.marinas@xxxxxxx> Cc: Ingo Molnar <mingo@xxxxxxxxxx> Cc: Borislav Petkov <bp@xxxxxxxxx> Cc: Matthew Wilcox <willy@xxxxxxxxxxxxx> Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx> --- arch/alpha/include/asm/pgtable.h | 5 ----- arch/arc/include/asm/pgtable.h | 5 ----- arch/arm/include/asm/pgtable-nommu.h | 5 ----- arch/arm/include/asm/pgtable.h | 2 -- arch/arm64/include/asm/pgtable.h | 2 -- arch/arm64/mm/pgd.c | 2 +- arch/c6x/include/asm/pgtable.h | 5 ----- arch/csky/include/asm/pgtable.h | 5 ----- arch/h8300/include/asm/pgtable.h | 6 ------ arch/hexagon/include/asm/pgtable.h | 3 --- arch/hexagon/mm/Makefile | 2 +- arch/hexagon/mm/pgalloc.c | 10 ---------- arch/ia64/include/asm/pgtable.h | 5 ----- arch/m68k/include/asm/pgtable_mm.h | 5 ----- arch/m68k/include/asm/pgtable_no.h | 5 ----- arch/microblaze/include/asm/pgtable.h | 7 ------- arch/mips/include/asm/pgtable.h | 5 ----- arch/nds32/include/asm/pgtable.h | 2 -- arch/nios2/include/asm/pgtable.h | 2 -- arch/openrisc/include/asm/pgtable.h | 5 ----- arch/parisc/include/asm/pgtable.h | 2 -- arch/powerpc/include/asm/pgtable.h | 1 - arch/riscv/include/asm/pgtable.h | 5 ----- arch/s390/include/asm/pgtable.h | 5 ----- arch/sh/include/asm/pgtable.h | 5 ----- arch/sh/mm/nommu.c | 4 ---- arch/sparc/include/asm/pgtable_32.h | 5 ----- arch/sparc/include/asm/pgtable_64.h | 1 - arch/um/include/asm/pgtable.h | 2 -- arch/unicore32/include/asm/pgtable.h | 2 -- arch/x86/include/asm/pgtable_32.h | 1 - arch/x86/include/asm/pgtable_64.h | 2 -- arch/x86/mm/pgtable.c | 6 +----- arch/xtensa/include/asm/pgtable.h | 1 - include/asm-generic/pgtable.h | 2 +- init/main.c | 3 +-- 36 files changed, 5 insertions(+), 130 deletions(-) --- a/arch/alpha/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/alpha/include/asm/pgtable.h @@ -359,11 +359,6 @@ extern void paging_init(void); #include <asm-generic/pgtable.h> -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - /* We have our own get_unmapped_area to cope with ADDR_LIMIT_32BIT. */ #define HAVE_ARCH_UNMAPPED_AREA --- a/arch/arc/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/arc/include/asm/pgtable.h @@ -395,11 +395,6 @@ void update_mmu_cache(struct vm_area_str /* to cope with aliasing VIPT cache */ #define HAVE_ARCH_UNMAPPED_AREA -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - #endif /* __ASSEMBLY__ */ #endif --- a/arch/arm64/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/arm64/include/asm/pgtable.h @@ -861,8 +861,6 @@ extern int kern_addr_valid(unsigned long #include <asm-generic/pgtable.h> -static inline void pgtable_cache_init(void) { } - /* * On AArch64, the cache coherency is handled via the set_pte_at() function. */ --- a/arch/arm64/mm/pgd.c~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/arm64/mm/pgd.c @@ -35,7 +35,7 @@ void pgd_free(struct mm_struct *mm, pgd_ kmem_cache_free(pgd_cache, pgd); } -void __init pgd_cache_init(void) +void __init pgtable_cache_init(void) { if (PGD_SIZE == PAGE_SIZE) return; --- a/arch/arm/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/arm/include/asm/pgtable.h @@ -368,8 +368,6 @@ static inline pte_t pte_modify(pte_t pte #define HAVE_ARCH_UNMAPPED_AREA #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN -#define pgtable_cache_init() do { } while (0) - #endif /* !__ASSEMBLY__ */ #endif /* CONFIG_MMU */ --- a/arch/arm/include/asm/pgtable-nommu.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/arm/include/asm/pgtable-nommu.h @@ -71,11 +71,6 @@ typedef pte_t *pte_addr_t; extern unsigned int kobjsize(const void *objp); /* - * No page table caches to initialise. - */ -#define pgtable_cache_init() do { } while (0) - -/* * All 32bit addresses are effectively valid for vmalloc... * Sort of meaningless for non-VM targets. */ --- a/arch/c6x/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/c6x/include/asm/pgtable.h @@ -60,11 +60,6 @@ extern unsigned long empty_zero_page; #define swapper_pg_dir ((pgd_t *) 0) /* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -/* * c6x is !MMU, so define the simpliest implementation */ #define pgprot_writecombine pgprot_noncached --- a/arch/csky/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/csky/include/asm/pgtable.h @@ -296,11 +296,6 @@ void update_mmu_cache(struct vm_area_str /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ #define kern_addr_valid(addr) (1) -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do {} while (0) - #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ remap_pfn_range(vma, vaddr, pfn, size, prot) --- a/arch/h8300/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/h8300/include/asm/pgtable.h @@ -4,7 +4,6 @@ #define __ARCH_USE_5LEVEL_HACK #include <asm-generic/pgtable-nopud.h> #include <asm-generic/pgtable.h> -#define pgtable_cache_init() do { } while (0) extern void paging_init(void); #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */ #define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */ @@ -35,11 +34,6 @@ extern unsigned int kobjsize(const void extern int is_in_rom(unsigned long); /* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -/* * All 32bit addresses are effectively valid for vmalloc... * Sort of meaningless for non-VM targets. */ --- a/arch/hexagon/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/hexagon/include/asm/pgtable.h @@ -431,9 +431,6 @@ static inline int pte_exec(pte_t pte) #define __pte_offset(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -/* I think this is in case we have page table caches; needed by init/main.c */ -#define pgtable_cache_init() do { } while (0) - /* * Swap/file PTE definitions. If _PAGE_PRESENT is zero, the rest of the PTE is * interpreted as swap information. The remaining free bits are interpreted as --- a/arch/hexagon/mm/Makefile~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/hexagon/mm/Makefile @@ -3,5 +3,5 @@ # Makefile for Hexagon memory management subsystem # -obj-y := init.o pgalloc.o ioremap.o uaccess.o vm_fault.o cache.o +obj-y := init.o ioremap.o uaccess.o vm_fault.o cache.o obj-y += copy_to_user.o copy_from_user.o strnlen_user.o vm_tlb.o --- a/arch/hexagon/mm/pgalloc.c +++ /dev/null @@ -1,10 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. - */ - -#include <linux/init.h> - -void __init pgtable_cache_init(void) -{ -} --- a/arch/ia64/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/ia64/include/asm/pgtable.h @@ -566,11 +566,6 @@ extern struct page *zero_page_memmap_ptr #define KERNEL_TR_PAGE_SHIFT _PAGE_SIZE_64M #define KERNEL_TR_PAGE_SIZE (1 << KERNEL_TR_PAGE_SHIFT) -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - /* These tell get_user_pages() that the first gate page is accessible from user-level. */ #define FIXADDR_USER_START GATE_ADDR #ifdef HAVE_BUGGY_SEGREL --- a/arch/m68k/include/asm/pgtable_mm.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/m68k/include/asm/pgtable_mm.h @@ -176,9 +176,4 @@ pgprot_t pgprot_dmacoherent(pgprot_t pro #include <asm-generic/pgtable.h> #endif /* !__ASSEMBLY__ */ -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - #endif /* _M68K_PGTABLE_H */ --- a/arch/m68k/include/asm/pgtable_no.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/m68k/include/asm/pgtable_no.h @@ -45,11 +45,6 @@ extern void paging_init(void); #define ZERO_PAGE(vaddr) (virt_to_page(0)) /* - * No page table caches to initialise. - */ -#define pgtable_cache_init() do { } while (0) - -/* * All 32bit addresses are effectively valid for vmalloc... * Sort of meaningless for non-VM targets. */ --- a/arch/microblaze/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/microblaze/include/asm/pgtable.h @@ -46,8 +46,6 @@ extern int mem_init_done; #define swapper_pg_dir ((pgd_t *) NULL) -#define pgtable_cache_init() do {} while (0) - #define arch_enter_lazy_cpu_mode() do {} while (0) #define pgprot_noncached_wc(prot) prot @@ -526,11 +524,6 @@ extern unsigned long iopa(unsigned long /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ #define kern_addr_valid(addr) (1) -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - void do_page_fault(struct pt_regs *regs, unsigned long address, unsigned long error_code); --- a/arch/mips/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/mips/include/asm/pgtable.h @@ -661,9 +661,4 @@ pgprot_t phys_mem_access_prot(struct fil #define HAVE_ARCH_UNMAPPED_AREA #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - #endif /* _ASM_PGTABLE_H */ --- a/arch/nds32/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/nds32/include/asm/pgtable.h @@ -403,8 +403,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD * into virtual address `from' */ -#define pgtable_cache_init() do { } while (0) - #endif /* !__ASSEMBLY__ */ #endif /* _ASMNDS32_PGTABLE_H */ --- a/arch/nios2/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/nios2/include/asm/pgtable.h @@ -291,8 +291,6 @@ static inline void pte_clear(struct mm_s #include <asm-generic/pgtable.h> -#define pgtable_cache_init() do { } while (0) - extern void __init paging_init(void); extern void __init mmu_init(void); --- a/arch/openrisc/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/openrisc/include/asm/pgtable.h @@ -443,11 +443,6 @@ static inline void update_mmu_cache(stru #include <asm-generic/pgtable.h> -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - typedef pte_t *pte_addr_t; #endif /* __ASSEMBLY__ */ --- a/arch/parisc/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/parisc/include/asm/pgtable.h @@ -132,8 +132,6 @@ static inline void purge_tlb_entries(str #define PTRS_PER_PTE (1UL << BITS_PER_PTE) /* Definitions for 2nd level */ -#define pgtable_cache_init() do { } while (0) - #define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE) #define PMD_SIZE (1UL << PMD_SHIFT) #define PMD_MASK (~(PMD_SIZE-1)) --- a/arch/powerpc/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/powerpc/include/asm/pgtable.h @@ -87,7 +87,6 @@ extern unsigned long ioremap_bot; unsigned long vmalloc_to_phys(void *vmalloc_addr); void pgtable_cache_add(unsigned int shift); -void pgtable_cache_init(void); #if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_PPC32) void mark_initmem_nx(void); --- a/arch/riscv/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/riscv/include/asm/pgtable.h @@ -424,11 +424,6 @@ extern void *dtb_early_va; extern void setup_bootmem(void); extern void paging_init(void); -static inline void pgtable_cache_init(void) -{ - /* No page table caches to initialize */ -} - #define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1) #define VMALLOC_END (PAGE_OFFSET - 1) #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) --- a/arch/s390/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/s390/include/asm/pgtable.h @@ -1682,11 +1682,6 @@ extern void s390_reset_cmma(struct mm_st #define HAVE_ARCH_UNMAPPED_AREA #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN -/* - * No page table caches to initialise - */ -static inline void pgtable_cache_init(void) { } - #include <asm-generic/pgtable.h> #endif /* _S390_PAGE_H */ --- a/arch/sh/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/sh/include/asm/pgtable.h @@ -123,11 +123,6 @@ typedef pte_t *pte_addr_t; #define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) -/* - * Initialise the page table caches - */ -extern void pgtable_cache_init(void); - struct vm_area_struct; struct mm_struct; --- a/arch/sh/mm/nommu.c~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/sh/mm/nommu.c @@ -97,7 +97,3 @@ void __init page_table_range_init(unsign void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot) { } - -void pgtable_cache_init(void) -{ -} --- a/arch/sparc/include/asm/pgtable_32.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/sparc/include/asm/pgtable_32.h @@ -445,9 +445,4 @@ static inline int io_remap_pfn_range(str /* We provide our own get_unmapped_area to cope with VA holes for userland */ #define HAVE_ARCH_UNMAPPED_AREA -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - #endif /* !(_SPARC_PGTABLE_H) */ --- a/arch/sparc/include/asm/pgtable_64.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/sparc/include/asm/pgtable_64.h @@ -1135,7 +1135,6 @@ unsigned long get_fb_unmapped_area(struc unsigned long); #define HAVE_ARCH_FB_UNMAPPED_AREA -void pgtable_cache_init(void); void sun4v_register_fault_status(void); void sun4v_ktsb_register(void); void __init cheetah_ecache_flush_init(void); --- a/arch/um/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/um/include/asm/pgtable.h @@ -32,8 +32,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD /* zero page used for uninitialized stuff */ extern unsigned long *empty_zero_page; -#define pgtable_cache_init() do ; while (0) - /* Just any arbitrary offset to the start of the vmalloc VM area: the * current 8MB value just means that there will be a 8MB "hole" after the * physical memory until the kernel virtual memory starts. That means that --- a/arch/unicore32/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/unicore32/include/asm/pgtable.h @@ -285,8 +285,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD #include <asm-generic/pgtable.h> -#define pgtable_cache_init() do { } while (0) - #endif /* !__ASSEMBLY__ */ #endif /* __UNICORE_PGTABLE_H__ */ --- a/arch/x86/include/asm/pgtable_32.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/x86/include/asm/pgtable_32.h @@ -29,7 +29,6 @@ extern pgd_t swapper_pg_dir[1024]; extern pgd_t initial_page_table[1024]; extern pmd_t initial_pg_pmd[]; -static inline void pgtable_cache_init(void) { } void paging_init(void); void sync_initial_page_table(void); --- a/arch/x86/include/asm/pgtable_64.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/x86/include/asm/pgtable_64.h @@ -241,8 +241,6 @@ extern void cleanup_highmap(void); #define HAVE_ARCH_UNMAPPED_AREA #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN -#define pgtable_cache_init() do { } while (0) - #define PAGE_AGP PAGE_KERNEL_NOCACHE #define HAVE_PAGE_AGP 1 --- a/arch/x86/mm/pgtable.c~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/x86/mm/pgtable.c @@ -357,7 +357,7 @@ static void pgd_prepopulate_user_pmd(str static struct kmem_cache *pgd_cache; -void __init pgd_cache_init(void) +void __init pgtable_cache_init(void) { /* * When PAE kernel is running as a Xen domain, it does not use @@ -402,10 +402,6 @@ static inline void _pgd_free(pgd_t *pgd) } #else -void __init pgd_cache_init(void) -{ -} - static inline pgd_t *_pgd_alloc(void) { return (pgd_t *)__get_free_pages(GFP_PGTABLE_USER, --- a/arch/xtensa/include/asm/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/arch/xtensa/include/asm/pgtable.h @@ -238,7 +238,6 @@ extern void paging_init(void); # define swapper_pg_dir NULL static inline void paging_init(void) { } #endif -static inline void pgtable_cache_init(void) { } /* * The pmd contains the kernel virtual address of the pte page. --- a/include/asm-generic/pgtable.h~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/include/asm-generic/pgtable.h @@ -1126,7 +1126,7 @@ int phys_mem_access_prot_allowed(struct static inline void init_espfix_bsp(void) { } #endif -extern void __init pgd_cache_init(void); +extern void __init pgtable_cache_init(void); #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot) --- a/init/main.c~mm-consolidate-pgtable_cache_init-and-pgd_cache_init +++ a/init/main.c @@ -507,7 +507,7 @@ void __init __weak mem_encrypt_init(void void __init __weak poking_init(void) { } -void __init __weak pgd_cache_init(void) { } +void __init __weak pgtable_cache_init(void) { } bool initcall_debug; core_param(initcall_debug, initcall_debug, bool, 0644); @@ -565,7 +565,6 @@ static void __init mm_init(void) init_espfix_bsp(); /* Should be run after espfix64 is set up. */ pti_init(); - pgd_cache_init(); } void __init __weak arch_call_rest_init(void) _
