The patch titled Subject: riscv: kbuild: add virtual memory system selection has been added to the -mm tree. Its filename is riscv-kbuild-add-virtual-memory-system-selection.patch This patch should soon appear at http://ozlabs.org/~akpm/mmots/broken-out/riscv-kbuild-add-virtual-memory-system-selection.patch and later at http://ozlabs.org/~akpm/mmotm/broken-out/riscv-kbuild-add-virtual-memory-system-selection.patch Before you just go and hit "reply", please: a) Consider who else should be cc'ed b) Prefer to cc a suitable mailing list as well c) Ideally: find the original patch on the mailing list and do a reply-to-all to that, adding suitable additional cc's *** Remember to use Documentation/process/submit-checklist.rst when testing your code *** The -mm tree is included into linux-next and is updated there every 3-4 working days ------------------------------------------------------ From: Paul Walmsley <paul.walmsley@xxxxxxxxxx> Subject: riscv: kbuild: add virtual memory system selection The RISC-V specifications currently define three virtual memory translation systems: Sv32, Sv39, and Sv48. Sv32 is currently specific to 32-bit systems; Sv39 and Sv48 are currently specific to 64-bit systems. The current kernel only supports Sv32 and Sv39, but we'd like to start preparing for Sv48. As an initial step, allow the virtual memory translation system to be selected via kbuild, and stop the build if an option is selected that the kernel doen't currently support. This second version of the patch fixes some errors in the Kconfig description text, found by Bin Meng <bmeng.cn@xxxxxxxxx>. This is preparation for "riscv: make mmap allocation top-down by default" and currently has no functional impact. Link: http://lkml.kernel.org/r/alpine.DEB.2.21.9999.1907301218560.3486@xxxxxxxxxxxxxxxx Signed-off-by: Paul Walmsley <paul.walmsley@xxxxxxxxxx> Cc: Alexandre Ghiti <alex@xxxxxxxx> Cc: Bin Meng <bmeng.cn@xxxxxxxxx> Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx> --- arch/riscv/Kconfig | 43 ++++++++++++++++++++++++++ arch/riscv/include/asm/pgtable-32.h | 4 ++ arch/riscv/include/asm/pgtable-64.h | 4 ++ 3 files changed, 51 insertions(+) --- a/arch/riscv/include/asm/pgtable-32.h~riscv-kbuild-add-virtual-memory-system-selection +++ a/arch/riscv/include/asm/pgtable-32.h @@ -6,6 +6,10 @@ #ifndef _ASM_RISCV_PGTABLE_32_H #define _ASM_RISCV_PGTABLE_32_H +#if !defined(CONFIG_RISCV_VM_SV32) +#error Only Sv32 supported +#endif + #include <asm-generic/pgtable-nopmd.h> #include <linux/const.h> --- a/arch/riscv/include/asm/pgtable-64.h~riscv-kbuild-add-virtual-memory-system-selection +++ a/arch/riscv/include/asm/pgtable-64.h @@ -6,6 +6,10 @@ #ifndef _ASM_RISCV_PGTABLE_64_H #define _ASM_RISCV_PGTABLE_64_H +#if !defined(CONFIG_RISCV_VM_SV39) +#error Only Sv39 supported for now +#endif + #include <linux/const.h> #define PGDIR_SHIFT 30 --- a/arch/riscv/Kconfig~riscv-kbuild-add-virtual-memory-system-selection +++ a/arch/riscv/Kconfig @@ -156,6 +156,49 @@ config MODULE_SECTIONS select HAVE_MOD_ARCH_SPECIFIC choice + prompt "Virtual Memory System" + default RISCV_VM_SV32 if 32BIT + default RISCV_VM_SV39 if 64BIT + help + The RISC-V Instruction Set Manual Volume II: Privileged + Architecture defines several different "virtual memory + systems" which specify virtual and physical address formats + and the structure of page table entries. This determines + the amount of virtual address space present and how it is + translated into physical addresses. + + config RISCV_VM_SV32 + depends on 32BIT + bool "RISC-V Sv32" + help + The Sv32 virtual memory system is a page-based + address and page table format for RV32 systems. + It specifies a translation between 32-bit virtual + addresses and 33-bit physical addresses, via a + two-stage page table layout. + config RISCV_VM_SV39 + depends on 64BIT + bool "RISC-V Sv39" + help + The Sv39 virtual memory system is a page-based + address and page table format for RV64 systems. + It specifies a translation between 39-bit virtual + addresses and 56-bit physical addresses, via a + three-stage page table layout. + config RISCV_VM_SV48 + depends on 64BIT + bool "RISC-V Sv48" + help + The Sv48 virtual memory system is a page-based + address and page table format for RV64 systems. + It specifies a translation between 48-bit virtual + addresses and 56-bit physical addresses, via a + four-stage page table layout. + +endchoice + + +choice prompt "Maximum Physical Memory" default MAXPHYSMEM_2GB if 32BIT default MAXPHYSMEM_2GB if 64BIT && CMODEL_MEDLOW _ Patches currently in -mm which might be from paul.walmsley@xxxxxxxxxx are riscv-kbuild-add-virtual-memory-system-selection.patch