The patch titled
Subject: mm: allow arch to supply p??_free_tlb functions
has been added to the -mm tree. Its filename is
mm-allow-arch-to-supply-p_free_tlb-functions.patch
This patch should soon appear at
http://ozlabs.org/~akpm/mmots/broken-out/mm-allow-arch-to-supply-p_free_tlb-functions.patch
and later at
http://ozlabs.org/~akpm/mmotm/broken-out/mm-allow-arch-to-supply-p_free_tlb-functions.patch
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------------------------------------------------------
From: Nicholas Piggin <npiggin@xxxxxxxxx>
Subject: mm: allow arch to supply p??_free_tlb functions
The mmu_gather APIs keep track of the invalidated address range including
the span covered by invalidated page table pages. Ranges covered by page
tables but not ptes (and therefore no TLBs) still need to be invalidated
because some architectures (x86) can cache intermediate page table
entries, and invalidate those with normal TLB invalidation instructions to
be almost-backward-compatible.
Architectures which don't cache intermediate page table entries, or which
invalidate these caches separately from TLB invalidation, do not require
TLB invalidation range expanded over page tables.
Allow architectures to supply their own p??_free_tlb functions, which can
avoid the __tlb_adjust_range.
Link: http://lkml.kernel.org/r/20180703013131.2807-1-npiggin@xxxxxxxxx
Signed-off-by: Nicholas Piggin <npiggin@xxxxxxxxx>
Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
Cc: "Aneesh Kumar K. V" <aneesh.kumar@xxxxxxxxxxxxxxxxxx>
Cc: Minchan Kim <minchan@xxxxxxxxxx>
Cc: Mel Gorman <mgorman@xxxxxxxxxxxxxxxxxxx>
Cc: Nadav Amit <nadav.amit@xxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
---
diff -puN include/asm-generic/tlb.h~mm-allow-arch-to-supply-p_free_tlb-functions include/asm-generic/tlb.h
--- a/include/asm-generic/tlb.h~mm-allow-arch-to-supply-p_free_tlb-functions
+++ a/include/asm-generic/tlb.h
@@ -265,33 +265,41 @@ static inline void tlb_remove_check_page
* For now w.r.t page table cache, mark the range_size as PAGE_SIZE
*/
+#ifndef pte_free_tlb
#define pte_free_tlb(tlb, ptep, address) \
do { \
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
__pte_free_tlb(tlb, ptep, address); \
} while (0)
+#endif
+#ifndef pmd_free_tlb
#define pmd_free_tlb(tlb, pmdp, address) \
do { \
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
__pmd_free_tlb(tlb, pmdp, address); \
} while (0)
+#endif
#ifndef __ARCH_HAS_4LEVEL_HACK
+#ifndef pud_free_tlb
#define pud_free_tlb(tlb, pudp, address) \
do { \
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
__pud_free_tlb(tlb, pudp, address); \
} while (0)
#endif
+#endif
#ifndef __ARCH_HAS_5LEVEL_HACK
+#ifndef p4d_free_tlb
#define p4d_free_tlb(tlb, pudp, address) \
do { \
__tlb_adjust_range(tlb, address, PAGE_SIZE); \
__p4d_free_tlb(tlb, pudp, address); \
} while (0)
#endif
+#endif
#define tlb_migrate_finish(mm) do {} while (0)
_
Patches currently in -mm which might be from npiggin@xxxxxxxxx are
mm-allow-arch-to-supply-p_free_tlb-functions.patch
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