The patch titled
Subject: mm/thp/migration: switch from flush_tlb_range to flush_pmd_tlb_range
has been added to the -mm tree. Its filename is
mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range.patch
This patch should soon appear at
http://ozlabs.org/~akpm/mmots/broken-out/mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range.patch
and later at
http://ozlabs.org/~akpm/mmotm/broken-out/mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range.patch
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------------------------------------------------------
From: "Aneesh Kumar K.V" <aneesh.kumar@xxxxxxxxxxxxxxxxxx>
Subject: mm/thp/migration: switch from flush_tlb_range to flush_pmd_tlb_range
We remove one instace of flush_tlb_range here. That was added by
f714f4f20e59ea6eea ("mm: numa: call MMU notifiers on THP migration"). But
the pmdp_huge_clear_flush_notify should have done the require flush for
us. Hence remove the extra flush.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@xxxxxxxxxxxxxxxxxx>
Cc: Mel Gorman <mgorman@xxxxxxxxxxxxxxxxxxx>
Cc: "Kirill A. Shutemov" <kirill.shutemov@xxxxxxxxxxxxxxx>
Cc: Vineet Gupta <Vineet.Gupta1@xxxxxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
---
include/asm-generic/pgtable.h | 17 +++++++++++++++++
mm/migrate.c | 8 +++++---
mm/pgtable-generic.c | 14 --------------
3 files changed, 22 insertions(+), 17 deletions(-)
diff -puN include/asm-generic/pgtable.h~mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range include/asm-generic/pgtable.h
--- a/include/asm-generic/pgtable.h~mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range
+++ a/include/asm-generic/pgtable.h
@@ -775,6 +775,23 @@ static inline int pmd_clear_huge(pmd_t *
}
#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
+#ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
+/*
+ * ARCHes with special requirements for evicting THP backing TLB entries can
+ * implement this. Otherwise also, it can help optimize normal TLB flush in
+ * THP regime. stock flush_tlb_range() typically has optimization to nuke the
+ * entire TLB TLB if flush span is greater than a threshold, which will
+ * likely be true for a single huge page. Thus a single thp flush will
+ * invalidate the entire TLB which is not desitable.
+ * e.g. see arch/arc: flush_pmd_tlb_range
+ */
+#define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
+#else
+#define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
+#endif
+#endif
+
#endif /* !__ASSEMBLY__ */
#ifndef io_remap_pfn_range
diff -puN mm/migrate.c~mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range mm/migrate.c
--- a/mm/migrate.c~mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range
+++ a/mm/migrate.c
@@ -1773,7 +1773,10 @@ int migrate_misplaced_transhuge_page(str
put_page(new_page);
goto out_fail;
}
-
+ /*
+ * We are not sure a pending tlb flush here is for a huge page
+ * mapping or not. Hence use the tlb range variant
+ */
if (mm_tlb_flush_pending(mm))
flush_tlb_range(vma, mmun_start, mmun_end);
@@ -1829,12 +1832,11 @@ fail_putback:
page_add_anon_rmap(new_page, vma, mmun_start, true);
pmdp_huge_clear_flush_notify(vma, mmun_start, pmd);
set_pmd_at(mm, mmun_start, pmd, entry);
- flush_tlb_range(vma, mmun_start, mmun_end);
update_mmu_cache_pmd(vma, address, &entry);
if (page_count(page) != 2) {
set_pmd_at(mm, mmun_start, pmd, orig_entry);
- flush_tlb_range(vma, mmun_start, mmun_end);
+ flush_pmd_tlb_range(vma, mmun_start, mmun_end);
mmu_notifier_invalidate_range(mm, mmun_start, mmun_end);
update_mmu_cache_pmd(vma, address, &entry);
page_remove_rmap(new_page, true);
diff -puN mm/pgtable-generic.c~mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range mm/pgtable-generic.c
--- a/mm/pgtable-generic.c~mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range
+++ a/mm/pgtable-generic.c
@@ -84,20 +84,6 @@ pte_t ptep_clear_flush(struct vm_area_st
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
-#ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
-
-/*
- * ARCHes with special requirements for evicting THP backing TLB entries can
- * implement this. Otherwise also, it can help optimize normal TLB flush in
- * THP regime. stock flush_tlb_range() typically has optimization to nuke the
- * entire TLB if flush span is greater than a threshold, which will
- * likely be true for a single huge page. Thus a single thp flush will
- * invalidate the entire TLB which is not desirable.
- * e.g. see arch/arc: flush_pmd_tlb_range
- */
-#define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
-#endif
-
#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
int pmdp_set_access_flags(struct vm_area_struct *vma,
unsigned long address, pmd_t *pmdp,
_
Patches currently in -mm which might be from aneesh.kumar@xxxxxxxxxxxxxxxxxx are
mm-thp-migration-switch-from-flush_tlb_range-to-flush_pmd_tlb_range.patch
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