The patch titled
arch/i386/pci/mmconfig.c tlb flush fix
has been added to the -mm tree. Its filename is
arch-i386-pci-mmconfigc-tlb-flush-fix.patch
See http://www.zip.com.au/~akpm/linux/patches/stuff/added-to-mm.txt to find
out what to do about this
------------------------------------------------------
Subject: arch/i386/pci/mmconfig.c tlb flush fix
From: OGAWA Hirofumi <hogawa@xxxxxxxxxxxxxxxx>
We use the fixmap for accessing pci config space in pci_mmcfg_read/write().
The problem is in pci_exp_set_dev_base(). It is caching a last accessed
address to avoid calling set_fixmap_nocache() whenever
pci_mmcfg_read/write() is used.
static inline void pci_exp_set_dev_base(int bus, int devfn)
{
u32 dev_base = base | (bus << 20) | (devfn << 12);
if (dev_base != mmcfg_last_accessed_device) {
mmcfg_last_accessed_device = dev_base;
set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
}
}
cpu0 cpu1
---------------------------------------------------------------------------
pci_mmcfg_read("device-A")
pci_exp_set_dev_base()
set_fixmap_nocache()
pci_mmcfg_read("device-B")
pci_exp_set_dev_base()
set_fixmap_nocache()
pci_mmcfg_read("device-B")
pci_exp_set_dev_base()
/* doesn't flush tlb */
But if cpus accessed the above order, the second pci_mmcfg_read() on cpu0
doesn't flush the TLB, because "mmcfg_last_accessed_device" is device-B.
So, second pci_mmcfg_read() on cpu0 accesses a device-A via a previous TLB
cache.
This patches fixes this situation by adding "mmcfg_last_accessed_cpu" check.
Signed-off-by: OGAWA Hirofumi <hogawa@xxxxxxxxxxxxxxxx>
Cc: Andi Kleen <ak@xxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxx>
---
arch/i386/pci/mmconfig.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff -puN arch/i386/pci/mmconfig.c~arch-i386-pci-mmconfigc-tlb-flush-fix arch/i386/pci/mmconfig.c
--- a/arch/i386/pci/mmconfig.c~arch-i386-pci-mmconfigc-tlb-flush-fix
+++ a/arch/i386/pci/mmconfig.c
@@ -26,6 +26,7 @@
/* The base address of the last MMCONFIG device accessed */
static u32 mmcfg_last_accessed_device;
+static int mmcfg_last_accessed_cpu;
static DECLARE_BITMAP(fallback_slots, MAX_CHECK_BUS*32);
@@ -70,8 +71,11 @@ static u32 get_base_addr(unsigned int se
static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
{
u32 dev_base = base | (bus << 20) | (devfn << 12);
- if (dev_base != mmcfg_last_accessed_device) {
+ int cpu = smp_processor_id();
+ if (dev_base != mmcfg_last_accessed_device ||
+ cpu != mmcfg_last_accessed_cpu) {
mmcfg_last_accessed_device = dev_base;
+ mmcfg_last_accessed_cpu = cpu;
set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
}
}
_
Patches currently in -mm which might be from hogawa@xxxxxxxxxxxxxxxx are
arch-i386-pci-mmconfigc-tlb-flush-fix.patch
-
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