The patch titled
mips: save write-only Config.OD from being clobbered
has been added to the -mm tree. Its filename is
mips-save-write-only-configod-from-being-clobbered.patch
See http://www.zip.com.au/~akpm/linux/patches/stuff/added-to-mm.txt to find
out what to do about this
------------------------------------------------------
Subject: mips: save write-only Config.OD from being clobbered
From: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>
Save the Config.OD bit from being clobbered by coherency_setup(). This
bit, when set, cures various errata in the early steppings of Au1x00 SOCs.
Unfortunately, the bit was write-only on those eraly revisions...
PS: This patch is stuck uncommitted since December, while it's a serious issue
causing the kernel lockups.
Signed-off-by: Konstantin Baidarov <kbaidarov@xxxxxxxxxxxxx>
Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>
Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxx>
---
arch/mips/au1000/common/setup.c | 11 +++++++++++
arch/mips/mm/c-r4k.c | 12 ++++++++++++
2 files changed, 23 insertions(+)
diff -puN arch/mips/au1000/common/setup.c~mips-save-write-only-configod-from-being-clobbered arch/mips/au1000/common/setup.c
--- devel/arch/mips/au1000/common/setup.c~mips-save-write-only-configod-from-being-clobbered 2006-05-25 14:54:28.000000000 -0700
+++ devel-akpm/arch/mips/au1000/common/setup.c 2006-05-25 14:54:28.000000000 -0700
@@ -144,6 +144,17 @@ void __init plat_setup(void)
au_writel(0, SYS_TOYTRIM);
}
+/*
+ * Fix up write-only Config[OD] bit after a write to that register. Since the
+ * bit always reads as 0 on those SOC revs that require it to be set to fight
+ * the various errata, we need to set it back to 1...
+ */
+void au1x00_fixup_config_od(void)
+{
+ if (cur_cpu_spec[0]->cpu_od)
+ set_c0_config(1<<19);
+}
+
#if defined(CONFIG_64BIT_PHYS_ADDR)
/* This routine should be valid for all Au1x based boards */
phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size)
diff -puN arch/mips/mm/c-r4k.c~mips-save-write-only-configod-from-being-clobbered arch/mips/mm/c-r4k.c
--- devel/arch/mips/mm/c-r4k.c~mips-save-write-only-configod-from-being-clobbered 2006-05-25 14:54:28.000000000 -0700
+++ devel-akpm/arch/mips/mm/c-r4k.c 2006-05-25 14:54:28.000000000 -0700
@@ -1137,8 +1137,20 @@ static void __init setup_scache(void)
static inline void coherency_setup(void)
{
+ extern void au1x00_fixup_config_od(void);
+
change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT);
+#ifdef CONFIG_SOC_AU1X00
+ /*
+ * c0_config.od (bit 19) is write only (and reads as 0) on many early
+ * revs of AMD Au1x00 SOCs. It disables the bus transaction overlapping
+ * and needs to be set to correct the various errata. So if it has been
+ * set by the board setup code we must leave it set...
+ */
+ au1x00_fixup_config_od();
+#endif
+
/*
* c0_status.cu=0 specifies that updates by the sc instruction use
* the coherency mode specified by the TLB; 1 means cachable
_
Patches currently in -mm which might be from sshtylyov@xxxxxxxxxxxxx are
git-mtd.patch
git-netdev-all.patch
mips-save-write-only-configod-from-being-clobbered.patch
ide-claim-extra-dma-ports-regardless-of-channel.patch
ide-remove-dma_base2-field-form-ide_hwif_t.patch
ide-always-release-dma-engine.patch
ide-hpt3xxn-clocking-fixes.patch
ide-actually-honor-drives-minimum-pio-dma-cycle-times.patch
ide-fix-hpt37x-timing-tables.patch
ide-optimize-hpt37x-timing-tables.patch
ide-fix-hpt3xx-hotswap-support.patch
ide-fix-the-case-of-multiple-hpt3xx-chips-present.patch
ide-hpt3xx-fix-pci-clock-detection.patch
ide-hpt3xx-fix-pci-clock-detection-fix-2.patch
ide-pdc202xx_old-remove-the-obsolete-busproc.patch
piix-fix-82371mx-enablebits.patch
piix-remove-check-for-broken-mw-dma-mode-0.patch
piix-slc90e66-pio-mode-fallback-fix.patch
ide_dma_speed-fixes.patch
ide_dma_speed-fixes-warning-fix.patch
ide_dma_speed-fixes-tidy.patch
hpt3xx-rework-rate-filtering.patch
hpt3xx-rework-rate-filtering-tidy.patch
hpt3xx-print-the-real-chip-name-at-startup.patch
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