The patch titled
revert x86_64-mm-i386-prefer-tsc
has been removed from the -mm tree. Its filename is
revert-x86_64-mm-i386-prefer-tsc.patch
This patch was probably dropped from -mm because
it has now been merged into a subsystem tree or
into Linus's tree, or because it was folded into
its parent patch in the -mm tree.
------------------------------------------------------
Subject: revert x86_64-mm-i386-prefer-tsc
From: Andrew Morton <akpm@xxxxxxxx>
Signed-off-by: Andrew Morton <akpm@xxxxxxxx>
---
arch/i386/kernel/apic.c | 49 ------------------------------
arch/i386/kernel/timers/timer.c | 25 ---------------
include/asm-i386/apicdef.h | 8 ----
include/asm-i386/hpet.h | 2 -
include/asm-i386/smp.h | 3 -
5 files changed, 87 deletions(-)
diff -puN arch/i386/kernel/apic.c~revert-x86_64-mm-i386-prefer-tsc arch/i386/kernel/apic.c
--- devel/arch/i386/kernel/apic.c~revert-x86_64-mm-i386-prefer-tsc 2006-05-15 20:38:15.000000000 -0700
+++ devel-akpm/arch/i386/kernel/apic.c 2006-05-15 20:38:15.000000000 -0700
@@ -1262,55 +1262,6 @@ int setup_profiling_timer(unsigned int m
}
/*
- * oem_force_hpet_timer -- force HPET mode for some boxes.
- *
- * Thus far, the major user of this is IBM's Summit2 series:
- *
- * Clustered boxes may have unsynced TSC problems if they are
- * multi-chassis. Use available data to take a good guess.
- * If in doubt, go HPET.
- */
-
-__cpuinit int oem_force_hpet_timer(void)
-{
- int i, clusters, zeros;
- unsigned id;
- DECLARE_BITMAP(clustermap, NUM_APIC_CLUSTERS);
-
- bitmap_zero(clustermap, NUM_APIC_CLUSTERS);
-
- for (i = 0; i < NR_CPUS; i++) {
- id = bios_cpu_apicid[i];
- if (id != BAD_APICID)
- __set_bit(APIC_CLUSTERID(id), clustermap);
- }
-
- /* Problem: Partially populated chassis may not have CPUs in some of
- * the APIC clusters they have been allocated. Only present CPUs have
- * bios_cpu_apicid entries, thus causing zeroes in the bitmap. Since
- * clusters are allocated sequentially, count zeros only if they are
- * bounded by ones.
- */
- clusters = 0;
- zeros = 0;
- for (i = 0; i < NUM_APIC_CLUSTERS; i++) {
- if (test_bit(i, clustermap)) {
- clusters += 1 + zeros;
- zeros = 0;
- } else
- ++zeros;
- }
-
- /*
- * If clusters > 2, then should be multi-chassis. Return 1 for HPET.
- * Else return 0 to use TSC.
- * May have to revisit this when multi-core + hyperthreaded CPUs come
- * out, but AFAIK this will work even for them.
- */
- return (clusters > 2);
-}
-
-/*
* This interrupt should _never_ happen with our APIC/SMP architecture
*/
fastcall void smp_spurious_interrupt(struct pt_regs *regs)
diff -puN arch/i386/kernel/timers/timer.c~revert-x86_64-mm-i386-prefer-tsc arch/i386/kernel/timers/timer.c
--- devel/arch/i386/kernel/timers/timer.c~revert-x86_64-mm-i386-prefer-tsc 2006-05-15 20:38:15.000000000 -0700
+++ devel-akpm/arch/i386/kernel/timers/timer.c 2006-05-15 20:38:15.000000000 -0700
@@ -2,7 +2,6 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/timer.h>
-#include <asm/hpet.h>
#ifdef CONFIG_HPET_TIMER
/*
@@ -47,24 +46,6 @@ void clock_fallback(void)
cur_timer = &timer_pit;
}
-/*
- * Make an educated guess if the TSC is trustworthy and synchronized
- * over all CPUs.
- */
-__cpuinit int unsynchronized_tsc(void)
-{
-#ifdef CONFIG_SMP
- if (oem_force_hpet_timer())
- return 1;
- /* Intel systems are normally all synchronized. Exceptions
- are handled in the OEM check above. */
- if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
- return 0;
-#endif
- /* Assume multi socket systems are not synchronized */
- return num_present_cpus() > 1;
-}
-
/* iterates through the list of timers, returning the first
* one that initializes successfully.
*/
@@ -72,12 +53,6 @@ struct timer_opts* __init select_timer(v
{
int i = 0;
- /* Prefer TSC if possible because it's fastest */
- if (clock_override[0] == 0 && !unsynchronized_tsc()) {
- if (timer_tsc_init.init(clock_override) == 0)
- return timer_tsc_init.opts;
- }
-
/* find most preferred working timer */
while (timers[i]) {
if (timers[i]->init)
diff -puN include/asm-i386/apicdef.h~revert-x86_64-mm-i386-prefer-tsc include/asm-i386/apicdef.h
--- devel/include/asm-i386/apicdef.h~revert-x86_64-mm-i386-prefer-tsc 2006-05-15 20:38:15.000000000 -0700
+++ devel-akpm/include/asm-i386/apicdef.h 2006-05-15 20:38:15.000000000 -0700
@@ -113,14 +113,6 @@
#define MAX_IO_APICS 64
-#define XAPIC_DEST_CPUS_SHIFT 4
-#define XAPIC_DEST_CPUS_MASK ((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
-#define XAPIC_DEST_CLUSTER_MASK (XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
-#define APIC_CLUSTER(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
-#define APIC_CLUSTERID(apicid) (APIC_CLUSTER(apicid) >> XAPIC_DEST_CPUS_SHIFT)
-#define APIC_CPUID(apicid) ((apicid) & XAPIC_DEST_CPUS_MASK)
-#define NUM_APIC_CLUSTERS ((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT)
-
/*
* the local APIC register structure, memory mapped. Not terribly well
* tested, but we might eventually use this one in the future - the
diff -puN include/asm-i386/hpet.h~revert-x86_64-mm-i386-prefer-tsc include/asm-i386/hpet.h
--- devel/include/asm-i386/hpet.h~revert-x86_64-mm-i386-prefer-tsc 2006-05-15 20:38:15.000000000 -0700
+++ devel-akpm/include/asm-i386/hpet.h 2006-05-15 20:38:15.000000000 -0700
@@ -101,8 +101,6 @@ extern int is_hpet_enabled(void);
extern int is_hpet_capable(void);
extern int hpet_readl(unsigned long a);
-extern int oem_force_hpet_timer(void);
-
#ifdef CONFIG_HPET_EMULATE_RTC
extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
diff -puN include/asm-i386/smp.h~revert-x86_64-mm-i386-prefer-tsc include/asm-i386/smp.h
--- devel/include/asm-i386/smp.h~revert-x86_64-mm-i386-prefer-tsc 2006-05-15 20:38:15.000000000 -0700
+++ devel-akpm/include/asm-i386/smp.h 2006-05-15 20:38:15.000000000 -0700
@@ -97,9 +97,6 @@ extern void __cpu_die(unsigned int cpu);
#ifndef __ASSEMBLY__
#ifdef CONFIG_X86_LOCAL_APIC
-
-extern u8 bios_cpu_apicid[];
-
static __inline int logical_smp_processor_id(void)
{
/* we don't want to mark this access volatile - bad code generation */
_
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pgdat-allocation-for-new-node-add-refresh-node_data-fix.patch
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