Hello,
Stefan Roese wrote:
> Testing has shown, that when using mainline U-Boot on MT7688 based
> boards, the system may hang or crash while mounting the root-fs. The
> main issue here is that mainline U-Boot configures EBase to a value
> near the end of system memory. And with CONFIG_CPU_MIPSR2_IRQ_VI
> disabled, trap_init() will not allocate a new area to place the
> exception handler. The original value will be used and the handler
> will be copied to this location, which might already be used by some
> userspace application.
>
> The MT7688 supports VI - its config3 register is 0x00002420, so VInt
> (Bit 5) is set. But without setting CONFIG_CPU_MIPSR2_IRQ_VI this
> bit will not be evaluated to result in "cpu_has_vi" beeing set. This
> patch now selects CONFIG_CPU_MIPSR2_IRQ_VI on MT7620/8 which results
> trap_init() to allocate some memory for the exception handler.
>
> Please note that this issue was not seen with the Mediatek U-Boot
> version, as it does not touch EBase (stays at default of 0x8000.0000).
> This is strictly also not correct as the kernel (_text) resides
> here.
>
> Signed-off-by: Stefan Roese <sr@xxxxxxx>
> Cc: John Crispin <blogic@xxxxxxxxxxx>
> Cc: Daniel Schwierzeck <daniel.schwierzeck@xxxxxxxxx>
> Cc: Paul Burton <paul.burton@xxxxxxxx>
> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Applied to mips-fixes.
Thanks,
Paul
[ This message was auto-generated; if you believe anything is incorrect
then please email paul.burton@xxxxxxxx to report it. ]
