Hello, I'm working on a (not yet upstreamed) dmaengine driver. While rebasing from v4.19 to v4.20-rc1, I saw that it is not working properly anymore because dma_pool is allocating descriptors in kseg0 which is cached while in v4.19, it was allocating them in kseg1. Am I missing something to explicitely state that the cache is not dma coherent? How could I track this behaviour change? -- Alexandre Belloni, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
